AMD 29050 (Am29050) microprocessor familyAMD 29050 (Am29050) is a 32-bit embedded RISC microprocessor
object-code compatible with other members of AMD 29K microprocessor
family, and pin-compatible with AMD
29000/29005 CPUs. Like the Am29000/Am29005, the Am29050 uses
three-bus Harvard architecture. The 29050 processors include integer
unit with a four-stage pipeline, which can execute most of integer
instructions in a single cycle. Major new feature in the the Am29050
CPU is an integrated Floating-Point Unit. The FP unit supports
arithmetic operations with single- and double-precision floating
point numbers, and can also perform multiplication of integer
numbers. The FP unit is independent from the integer unit, that is
both integer and floating-point operations can be done in parallel.
Although execution of many FP instructions takes one or more cycles,
there are four FP instructions that can execute two arithmetic
operations, multiply and sum, during each CPU cycle. Running any
these 4 instructions allows the 40 MHz version of the 29050 CPU to
achieve peak rate of 80 MFLOPS (millions of floating-point operations
per second). The Am29050 microprocessor doesn't have instruction or
data caches, but includes 1 KB Branch Target cache, that is twice as
large as on the Am29000 CPU. This cache is used to cache first two or
four instructions after each branch instruction. The Am29050 CPU
includes other enhancements over the 29000 processor:
The Am29050 microprocessors were produced in ceramic PGA package. 33- and 40-MHz versions of the processor were manufactured with integrated heatspreader. Die pictures:
Production parts
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