Western Electric 32106 (WE32106) is a Floating Point Unit for WE
32100 microprocessor family. The FPU can execute all basic
mathematical operations, comparison and rounding operations, and
calculates square root. The WE32106 supports single, double and
extended precision floating point numbers. The co-processor can also
read and write data in BCD and integer formats. When the 32106 loads
the data, it converts it to extended-precision numbers, and all
internal operations are performed with these extended-precision
numbers.
The WE32106 co-processor has two modes of operation:
- Co-processor mode. In this mode the FPU communicates directly with
the 32100 CPU. The CPU recognizes 10 co-processor instructions. These
are not instructions for the 32106 FPU - the instructions tell the
CPU the types of co-processor operands and how many operands are
required. The co-processor instructions also contain actual WE32106
instruction op-code, which is passed to the FPU. Then, if the
instruction requires memory data, the CPU starts reading data from
memory. This data is ignored by the CPU, but it is fetched by the FPU
from the bus. When the FPU completes instruction execution it
automatically notifies the CPU, and sends condition codes and
exception data to the CPU. If the instruction result should be saved
in memory, the CPU initiates write operation, and the FPU supplies
the resulting data.
- Peripheral mode. In this mode all FPU registers are mapped in
processor memory, and the 32100 or other CPU can write floating-point
instructions and data directly to these registers. When the FPU
completes instruction execution the CPU can read results, condition
codes and exception data from FPU registers.
Peripheral mode of operation is slower than co-processor mode because
the CPU has to explicitly write to and read from FPU registers. The
advantage of peripheral mode is that it can be used with any CPU.
When used with WE32100 CPU, the peripheral mode allows the FPU
execute floating-point instructions that work with three memory
operands, while in co-processor mode the FPU is limited to two memory
operands.
|