| General information |
| Type | CPU / Microprocessor |
| Frequency (MHz) ? | 150 (rated 200) |
| Bus speed (MHz) ? | 75 |
| Clock multiplier ? | 2 |
| Package | 296-pin Staggered Ceramic Pin Grid Array, 1.952" x 1.952" (4.96 cm x 4.96 cm) |
| Introduction date | 05/30/1997 |
| Price at introduction | $240 |
| |
| Architecture / Microarchitecture |
| Manufacturing process | 0.35 micron 5-layer metal CMOS |
| Data width | 32 bit |
| Floating Point Unit | Integrated |
| Level 1 cache size ? | 256 bytes primary code cache
64 KB 4-way set associative unified data/code write-back cache |
| Physical memory (GB) | 4 |
| Features | MMX technology |
| |
| Electrical/Thermal parameters |
| Min/Recommended/Max V core (V) | 2.8 / 2.9 / 3.0 |
| Min/Recommended/Max V I/O or secondary (V) | 3.135 / 3.3 / 3.465 |
| Min/Max operating temperature (°C) ? | 0 - 70 |
.jpg)
