FPU Information
| General information |
| Type | Floating Point Unit (Co-processor) |
| Frequency (MHz) ? | 5? |
| Package | 40-pin side-brazed ceramic DIP |
| Introduction date | 1980 |
| | | Architecture / Microarchitecture |
| Manufacturing process | N-channel, depletion load, silicon gate technology (HMOS) |
| Data width | 16 bit |
| | | Electrical/Thermal parameters |
| V core (V) ? | 5 |
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| Notes |
- Information is provided for Intel C8087-3 co-processor.
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Pictures (1)
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| IBM C8087-3 |
5 MHz
40-pin side-brazed ceramic DIP
"IBM" stamped on the chip |
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