| General information |
| Type | Floating Point Unit (Co-processor) |
| Frequency (MHz) ? | 5 |
| Package | 40-pin side-brazed ceramic DIP |
| Introduction date | 1980 |
| |
| Architecture / Microarchitecture |
| Manufacturing process | N-channel, depletion load, silicon gate technology (HMOS) |
| Data width | 16 bit |
| |
| Electrical/Thermal parameters |
| V core (V) ? | 5 ± 5% |
| Min/Max operating temperature (°C) ? | -55 - 125 |
| Max power dissipation (W) ? | 3 |
| |
| Notes |
- Co-processor woks with 8086, 8088 and 80186 microprocessors
- Minimum operating frequency is 2 MHz
- This part is compliant to MIL STD 883 Revision C
|
