| General information |
| Type | CPU / Microprocessor |
| Family | Intel Atom |
| Model number ? | Z510P |
| CPU part number | CH80566EC005DW (SLGPQ) |
| Frequency (MHz) ? | 1100 |
| Bus speed (MHz) ? | 400 |
| Clock multiplier ? | 11 |
| Package | 437-ball micro-FCBGA8
0.87" x 0.87" (2.2 cm x 2.2 cm) |
| Introduction date | Mar 2, 2009 |
| |
| Architecture / Microarchitecture |
| Processor core | Silverthorne |
| Core stepping | C0 (SLGPQ) |
| Manufacturing process | 0.045 micron
47 million transistors |
| Data width | 32 bit |
| Number of cores | 1 |
| Floating Point Unit | Integrated |
| Level 1 cache size ? | 32 KB instruction cache
24 KB write-back data cache |
| Level 2 cache size ? | 512 KB 8-way set associative |
| Features | - MMX technology
- SSE
- SSE2
- SSE3
- Supplemental SSE3
- Hyper-Threading technology
- Execute Disable bit ?
|
| Low power features | - C1/AutoHalt state
- C1/MWAIT state
- Enhanced HALT state
- Stop Grant state ?
- Enhanced Stop Grant state
- Sleep state ?
- Deep Sleep state ?
- Deeper Sleep state ?
- Enhanced Deeper Sleep state ?
- C5 state
- Deep Power-down technology ?
- Enhanced SpeedStep technology ?
|
| |
| Electrical/Thermal parameters |
| V core (V) ? | 1.1 |
| Minimum/Maximum operating temperature (°C) ? | 0 - 90 |
| Minimum/Maximum power dissipation (W) ? | 0.1 (TDP for Deep Powerdown state) / 4.57 |
| Thermal Design Power (W) ? | 2 (HT disabled)
2.2 (HT enabled) |
| |
| Notes on Intel CH80566EC005DW |
- Actual bus frequency is 100 MHz. Because the processor uses Quad Data Rate bus the effective bus speed is 400 MHz
- Embedded microprocessor
- The processor runs at 0.6 GHz in the Lowest Frequency mode
|
