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AMD A8-Series A8-4500M - AM4500DEC44HJ
Specifications
Tools
AMD A8-4500M specifications
| General information |
| Type | CPU / Microprocessor |
| Market segment | Mobile |
| Family | AMD A8-Series for Notebooks |
| Model number ? | A8-4500M |
| CPU part number | AM4500DEC44HJ is an OEM/tray microprocessor |
| Frequency ? | 1900 MHz |
| Turbo frequency | 2800 MHz |
| Package | 722-pin micro-PGA |
| Socket | Socket FS1 (FS1r2) |
| Size | 1.38" x 1.38" / 3.5cm x 3.5cm |
| Introduction date | May 15, 2012 |
| | | Architecture / Microarchitecture |
| Microarchitecture | Piledriver |
| Processor core ? | Trinity |
| Core stepping ? | TN-A1 |
| CPUID | 610F01 |
| Manufacturing process | 0.032 micron
1303 million transistors |
| Die size | 246mm2 |
| Data width | 64 bit |
| The number of cores | 4 |
| The number of threads | 4 |
| Floating Point Unit | Integrated |
| Level 1 cache size ? | 2 x 64 KB 2-way associative shared instruction caches
4 x 16 KB 4-way associative data caches |
| Level 2 cache size ? | 2 x 2 MB 16-way associative shared caches |
| Level 3 cache size | None |
| Multiprocessing | Uniprocessor |
| Features | - MMX instructions
- SSE / Streaming SIMD Extensions
- SSE2 / Streaming SIMD Extensions 2
- SSE3 / Streaming SIMD Extensions 3
- SSSE3 / Supplemental Streaming SIMD Extensions 3
- SSE4 / SSE4.1 + SSE4.2 / Streaming SIMD Extensions 4 ?
- SSE4a ?
- AES / Advanced Encryption Standard instructions
- ABM / Advanced Bit Manipulation ?
- AVX / Advanced Vector Extensions
- BMI / Bit Manipulation instructions
- F16C / 16-bit Floating-Point conversion instructions
- FMA3 / 3-operand Fused Multiply-Add instructions
- FMA4 / 4-operand Fused Multiply-Add instructions
- TBM / Trailing Bit Manipulation instructions
- XOP / eXtended Operations instructions
- AMD64 / AMD 64-bit technology ?
- VT / Virtualization technology ?
- EVP / Enhanced Virus Protection ?
- Turbo Core 3.0 technology
|
| Low power features | - Core C1, C1E, C6 and CC6 states
- Package S3, S4 and S5 states
- PowerNow!
|
| | | Integrated peripherals / components |
| Integrated graphics | - GPU Type: Radeon HD 7640G
Shader cores: 256
Base frequency (MHz): 496
Maximum frequency (MHz): 685
|
| Memory controller | - The number of controllers: 1
Memory channels: 2
Supported memory: DDR3-1600, DDR3L-1600, DDR3U-1333
|
| Other peripherals | - PCI Express 2.0
- HD Media Accelerator
- DVI / DisplayPort / HDMI / VGA display controllers
|
| | | Electrical / Thermal parameters |
| V core ? | 0.8125V - 1.3V |
| Maximum operating temperature ? | 100°C |
| Thermal Design Power ? | 35 Watt |
| |
CPUs, related to AMD A8-4500M
| Model |
Cores / Threads |
Freq. |
Turbo freq. |
L2 cache |
TDP |
Features |
| AMD A8-Series for Notebooks family, Socket FS1 (FS1r2) |
| A8-4500M | 4 / 4 | 1.9 GHz | 2.8 GHz | 4 MB | 35 Watt | |
| A8-5550M | 4 / 4 | 2.1 GHz | 3.1 GHz | 4 MB | 35 Watt | |
| AMD A8-Series for Notebooks family, Bulldozer micro-architecture, Other sockets |
| A8-4555M | 4 / 4 | 1.6 GHz | 2.4 GHz | 4 MB | 19 Watt | |
| A8-4557M | 4 / 4 | 1.9 GHz | 2.8 GHz | 4 MB | 35 Watt | |
| Other families, Bulldozer micro-architecture, Socket FS1 (FS1r2) |
| A4-4300M | 2 / 2 | 2.5 GHz | 3 GHz | 1 MB | 35 Watt | |
| A6-4400M | 2 / 2 | 2.7 GHz | 3.2 GHz | 1 MB | 35 Watt | |
| A10-4600M | 4 / 4 | 2.3 GHz | 3.2 GHz | 4 MB | 35 Watt | |
• Within each category, the CPUs are sorted from slower (at the top) to faster (at the bottom)
FAQ
Q: I have an AMD A8-4500M CPU. Can I upgrade it?
A: Probably yes. Processor compatibility is determined by your motherboard. Please check CPU-Upgrade.com resource for CPU support list for your board.
AMD A8-4500M Overclocking
Sorry, overclocking information is not available at this time.
News
AMD debuts second-generation mobile APUs
May 16, 2012: AMD yesterday launched Comal mobile platform, accompanied by
several mobile Accelerated Processing Units (APU). New processors use
"Trinity" design, that combines 1 or 2 Piledriver modules (2 or 4 CPU
cores), HD 7000M series graphics unit and HD Media Accelerator on a single
die. "Trinity" chips feature many enhancements over previous
generations of Bulldozer processors and Llano APUs. According to AMD,
improved micro-architecture and higher operating frequencies result in
up to 29% better CPU performance than previous generation of APUs.
Furthermore, new HD 7000M series GPU provides up to 56% better
performance in graphics applications.
AMD to launch Brazos 2.0 in June, desktop APUs in August
May 14, 2012: This and next quarter AMD plans to release new generation of Accelerated Processing Units
(APUs). Soon to be available microprocessors will use enhanced
microarchitecture, and feature significantly improved on-chip graphics,
codenamed Graphics Core Next. There were a couple of reports in the past
month, placing the launch of first mobile APUs in the middle of May.
Release date for mobile APUs was
confirmed
last week by DigiTimes. They also revealed launch dates of desktop
APUs, and ultra low voltage processors from Brazos 2.0 platform.
CPU ID (1)
CPUID Tools
CPUID features of AMD A8-4500M
NOTE: The CPU ID information below was taken from one CPU and
may include features that are not present in all different steppings of the
AMD A8-Series for Notebooks A8-4500M CPU.
| Manufacturer: | AMD |
| CPU Family: | A8-Series for Notebooks |
| Model Number: | A8-4500M |
| Frequency: | 1896 MHz |
|
| Part number: | AM4500DEC44HJ |
| Stepping Code: | |
| Comment: | |
| Submitted by: | |
|
| General information |
| Vendor: | AuthenticAMD |
| Processor name (BIOS): | AMD A8-4500M APU with Radeon(tm) HD Graphics |
| Cores: | 4 |
| Compute units: | 2 |
| Logical processors: | 4 |
| Processor type: | Original OEM Processor |
| Core stepping: | TN-A1 |
| CPUID signature: | 610F01 |
| Family: | 21 (015h) |
| Model: | 16 (010h) |
| Stepping: | 1 (01h) |
| Socket: | AM3+ |
| Cache: |
L1 data |
L1 instruction |
L2 |
| Size: |
4 x 16 KB |
2 x 64 KB |
2 x 2 MB |
| Associativity: |
4-way set associative |
2-way set associative |
16-way set associative |
| Line size: |
64 bytes |
64 bytes |
64 bytes |
| Lines per tag: |
1 |
1 |
1 |
| Comments: |
|
1 cache per 2 cores |
1 cache per 2 cores |
| |
| Instruction set extensions | Additional instructions |
| MMX |
Advanced Bit manipulation |
| AMD extensions to MMX |
CLFLUSH |
| SSE |
CMOV |
| SSE2 |
CMPXCHG16B |
| SSE3 |
CMPXCHG8B |
| SSSE3 |
FXSAVE/FXRSTORE |
| SSE4A |
MONITOR/MWAIT |
| SSE4.1 |
PCLMULDQ |
| SSE4.2 |
POPCNT |
| AES |
PREFETCH/PREFETCHW |
| AVX |
RDTSCP |
| BMI |
SKINIT / STGI support |
| F16C |
SYSCALL/SYSRET |
| FMA |
SYSENTER/SYSEXIT |
| FMA4 |
XSAVE / XRESTORE states |
| TBM |
XSETBV / XGETBV are enabled |
| XOP |
|
| |
| Major features | Other features |
| On-chip Floating Point Unit |
1 GB large page support |
| 64-bit / Intel 64 |
100MHz multiplier control |
| NX bit/XD-bit |
128-bit SSE instructions |
| Secure Virtual Machine (Virtualization) |
36-bit page-size extensions |
| Turbo Core |
Advanced programmable interrupt controller |
| PowerNow! / Cool'n'Quiet |
Core multi-processing legacy mode |
| |
Debugging extensions |
| |
Extended APIC space |
| |
Hardware P-state control |
| |
Hardware thermal control |
| |
Instruction based sampling |
| |
LAHF / SAHF support in 64-bit mode |
| |
LBR virtualization |
| |
LOCK MOV CR0 means MOV CR8 |
| |
Lightweight profiling support |
| |
Machine check architecture |
| |
Machine check exception |
| |
Memory-type range registers |
| |
Misaligned SSE mode |
| |
Model-specific registers |
| |
Nested page tables |
| |
OS visible workaround |
| |
Page attribute table |
| |
Page global extension |
| |
Page-size extensions (4MB pages) |
| |
Physical address extensions |
| |
SVM lock |
| |
Support for NRIP save |
| |
THERMTRIP |
| |
TSC rate is ensured to be invariant across all states |
| |
Temperature sensor |
| |
Time stamp counter |
| |
Virtual 8086-mode enhancements |
| |
Watchdog timer support |
Comments (0)
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