VIA C7-M microprocessor
VIA C7-M is family of mobile microprocessors designed for slim notebooks and ultra portable devices. The family was introduced five days after the C7 family, and has the same features as the C7 microprocessors: large 64 KB level 1 instruction and data caches, exclusive 128 KB level 2 cache, quad-pumped Front Side Bus, support for SIMD instructions up to SSE3, and Padlock security engine. The Padlock engine is a suite of security technologies consisting of Secure Hash engine for SHA-1 and SHA-256 algorithms, AES encryption, two Random Number Generators, and NX protection bit (similar to AMD's Enhanced Virus protection and Intel's Execute Disable bit). The C7-M CPUs have a few power-saving modes that greatly reduce power consumption when the CPU is idle. The C7-M processors also incorporate Enhanced PowerSaver feature that reduces CPU's frequency and core voltage, thus reducing processor's power consumption, when maximum system performance is not required. The Enhanced PowerSaver is similar to Intel's Enhanced SpeedStep technology.
There are two different models of C7-M processors - model A with CPUID 06Axh, and model D with CPUID 06Dxh. Model D processors incorporate a few improvements to Enhanced PowerSaver and Thermal Monitor features. Models A and D can be visually identified from a lot number - model A processors have a lot number starting from "D6", and model D CPUs have a lot number starting from "B9".
Many mobile C7 microprocessors are packaged in small, 21mm x 21 mm (less than 1 inch by 1 inch) Ball Grid Array package. One of the C7-M processors is offered in very small (11 mm x 11 mm) package, and a few models were manufactured in 478-pin micro-PGA package, which is compatible with socket 479 motherboards.
At a glance
1 - 2
L2 cache size (KB):
3.5 - 20