Intel Celeron 1300 - RK80530RY013256 (BX80530F1300256)

CPU Information

General information
TypeCPU / Microprocessor
FamilyIntel Celeron
CPU part numberRK80530RY013256 (QIC9QS, SL5VR, SL6C7)
Box part numberBX80530F1300256 (SL5VR, SL5ZJ, SL6C7, SL6JT)
Frequency (MHz)  ? 1300
Bus speed (MHz)  ? 100
Clock multiplier  ? 13
Package370-pin Flip-Chip Pin Grid Array with integrated heatsink (FC-PGA2)
1.95" x 1.95" (4.95 cm x 4.95 cm)
SocketSocket 370 (PGA370)
 
Architecture / Microarchitecture
Processor coreTualatin-256
Core steppingsA1 (SL5VR, SL5ZJ)
B1 (SL6C7, SL6JT)
Manufacturing process0.13 micron
Data width32 bit
Floating Point UnitIntegrated
Level 1 cache size  ? 16 KB code
16 KB data
Level 2 cache size  ? On-die 8-way set associative 256 KB
Physical memory (GB)4
Features
  • MMX technology
  • SSE
Low power features
  • AutoHALT state  ? 
  • Stop Grant state  ? 
  • Sleep state  ? 
  • Deep Sleep state  ? 
 
Electrical/Thermal parameters
V core (V)  ? 1.5
Maximum operating temperature (°C)  ? 71
Minimum/Maximum power dissipation (W)  ? 18 (Deep sleep mode) / 33.75
 
Notes on Intel RK80530RY013256
  • The processor is usually marked as 1300/256/100/1.5

Pictures (1)

1300/256/100/1.5

Intel Celeron 1300 - RK80530RY013256 (BX80530F1300256)

CPU ID

NOTE: CPU ID information below was taken from one CPU and may include features that are not present in all different steppings of the Intel Celeron 1300 MHz CPU.

Manufacturer:Intel
Family:Celeron
Model / Processor Number:1300 MHz
Part number:RK80530RY013256
S-Spec / Comment:SL5VR
Submitted by:Neon
General information
Vendor:GenuineIntel
Processor name (BIOS):Intel(R) Celeron(TM) CPU 1300MHz
Processor type:Original OEM Processor
CPUID signature:6B1
Family: 6 (06h)
Model:11 (0Bh)
Stepping: 1 (01h)
TLB/Cache details:Data TLB: 4-KB Pages, 4-way set associative, 64 entries
Data TLB: 4-MB Pages, 4-way set associative, 8 entries
Instruction TLB: 4-KB Pages, 4-way set associative, 32 entries
Instruction TLB: 4-MB Pages, fully associative, 2 entries

Cache: L1 (data) L1 (instruction) L2
Size: 16 KB 16 KB 256 KB
Associativity: 4-way set associative 4-way set associative 8-way set associative
Line size: 32 bytes 32 bytes 32 bytes
 
Instruction set extensionsAdditonal instructions
MMX CMOV
SSE CMPXCHG8B
  FXSAVE/FXRSTORE
  SYSENTER/SYSEXIT
 
Major featuresOther features
On-chip Floating Point Unit 36-bit page-size extensions
  Advanced programmable interrupt controller
  Debugging extensions
  Machine check architecture
  Machine check exception
  Memory-type range registers
  Model-specific registers
  Page attribute table
  Page global extension
  Page-size extensions (4MB pages)
  Physical address extensions
  Time stamp counter
  Virtual 8086-mode enhancements

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