Specifications
| General information |
| Type | CPU / Microprocessor |
| Market segment | Desktop |
| Family | Intel Celeron |
| CPU part numbers | RB80526RY900128 is an OEM/tray microprocessor BX80526F900128 is a boxed microprocessor |
| Frequency (MHz) ? | 900 |
| Bus speed (MHz) ? | 100 |
| Clock multiplier ? | 9 |
| Package | 370-pin Flip-Chip Pin Grid Array
1.95" x 1.95" (4.95 cm x 4.95 cm) |
| Socket | Socket 370 (PGA370) |
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| S-spec numbers |
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| Architecture / Microarchitecture |
| Microarchitecture | P6 |
| Processor core ? | Coppermine-128 |
| Core stepping ? | D0 (SL5LX, SL5MQ, SL5WA, SL5WY, SL633) |
| CPUID | 68A (SL5LX, SL5MQ, SL5WA, SL5WY, SL633) |
| Manufacturing process | 0.18 micron |
| Data width | 32 bit |
| Floating Point Unit | Integrated |
| Level 1 cache size ? | 16 KB code
16 KB data |
| Level 2 cache size ? | 128 KB |
| Physical memory (GB) | 4 |
| Features | |
| Low power features | - AutoHALT state ?
- Stop Grant state ?
- Sleep state ?
- Deep Sleep state ?
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| Electrical/Thermal parameters |
| V core (V) ? | 1.75 |
| Minimum/Maximum operating temperature (°C) ? | 0 - 77 |
| Minimum/Maximum power dissipation (W) ? | 11.55 (Deep sleep mode) / 32.94 |
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| Notes on Intel RB80526RY900128 |
- The processor is usually marked as 900/128/100/1.75V
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CPUs, related to Intel Celeron 900 MHz (RB80526RY900128)
• Within each category, the CPUs are sorted from slower (at the top) to faster (at the bottom)
• List of related CPUs is not complete.
CPU ID (1)
NOTE: CPU ID information below was taken from one CPU and
may include features that are not present in all different steppings of the
Intel Celeron 900 CPU.
| Manufacturer: | Intel |
| CPU Family: | Celeron |
| Processor Number: | 900 |
| Frequency: | 902 MHz |
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| Part number: | RB80526RY900128 |
| S-Spec Number: | SL5LX |
| Comment: | |
| Submitted by: | Neon |
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| General information |
| Vendor: | GenuineIntel |
| Processor type: | Original OEM Processor |
| CPUID signature: | 68A |
| Family: | 6 (06h) |
| Model: | 8 (08h) |
| Stepping: | 10 (0Ah) |
| TLB/Cache details: | Data TLB: 4-KB Pages, 4-way set associative, 64 entries
Data TLB: 4-MB Pages, 4-way set associative, 8 entries
Instruction TLB: 4-KB Pages, 4-way set associative, 32 entries
Instruction TLB: 4-MB Pages, fully associative, 2 entries |
| Cache: |
L1 data |
L1 instruction |
L2 |
| Size: |
16 KB |
16 KB |
128 KB |
| Associativity: |
4-way set associative |
4-way set associative |
4-way set associative |
| Line size: |
32 bytes |
32 bytes |
32 bytes |
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| Instruction set extensions | Additional instructions |
| MMX |
CMOV |
| SSE |
CMPXCHG8B |
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FXSAVE/FXRSTORE |
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SYSENTER/SYSEXIT |
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| Major features | Other features |
| On-chip Floating Point Unit |
36-bit page-size extensions |
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Debugging extensions |
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Machine check architecture |
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Machine check exception |
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Memory-type range registers |
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Model-specific registers |
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Page attribute table |
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Page global extension |
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Page-size extensions (4MB pages) |
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Physical address extensions |
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Time stamp counter |
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Virtual 8086-mode enhancements |