Intel Mobile Celeron 266 MHz - KP80524KX266128
Specifications
| General information | ||||||||||
| Type | CPU / Microprocessor | |||||||||
| Market segment | Mobile | |||||||||
| Family | Intel Mobile Celeron (Mendocino) | |||||||||
| CPU part number | KP80524KX266128 is an OEM/tray microprocessor | |||||||||
| Frequency (MHz) ? | 266 | |||||||||
| Bus speed (MHz) ? | 66 | |||||||||
| Clock multiplier ? | 4 | |||||||||
| Package | 615-pin micro-PGA (PPGA-B615) 1.45" x 1.28" (3.68 cm x 3.26 cm) | |||||||||
| Socket | Socket 615 | |||||||||
| Introduction date | May 17, 1999 | |||||||||
| S-spec numbers | ||||||||||
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| Architecture / Microarchitecture | ||||||||||
| Microarchitecture | P6 | |||||||||
| Processor core ? | Mendocino | |||||||||
| Core stepping ? | mcpA0 (QB40, SL3HM) | |||||||||
| CPUID | 66A (QB40, SL3HM) | |||||||||
| Manufacturing process | 0.25 micron | |||||||||
| Data width | 32 bit | |||||||||
| Floating Point Unit | Integrated | |||||||||
| Level 1 cache size ? | 16 KB 4-way set associative instruction cache 16 KB 4-way set associative write-back data cache | |||||||||
| Level 2 cache size ? | 128 KB 4-way set associative | |||||||||
| Features | MMX technology | |||||||||
| Low power features |
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| Electrical/Thermal parameters | ||||||||||
| Min/Recommended/Max V core (V) | 1.465 / 1.6 / 1.735 | |||||||||
| Minimum/Maximum operating temperature (°C) ? | 0 - 100 | |||||||||
| Minimum/Maximum power dissipation (W) ? | 1.27 (Deep sleep state) / 11.64 | |||||||||
| Thermal Design Power (W) ? | 9.8 | |||||||||
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Pictures (3)
| Qualification Sample - Top view | |
266 MHz 66 MHz FSB 128 KB L2 cache 615-pin micro-PGA |
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| Qualification Sample - Bottom view | |
266 MHz 66 MHz FSB 128 KB L2 cache 615-pin micro-PGA |
%20(back).jpg) |
| Qualification Sample - Side view | |
266 MHz 66 MHz FSB 128 KB L2 cache 615-pin micro-PGA |
%20(side).jpg) |
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