| General information |
| Type | CPU / Microprocessor |
| Family | Intel Core 2 Duo Mobile |
| Model number ? | L7500 |
| Part number | LE80537LG0254M |
| Specification number ? | SLA3R |
| Frequency (MHz) ? | 1600 |
| Bus speed (MHz) ? | 800 |
| Clock multiplier ? | 8 |
| Package | 479-ball micro-FCBGA
1.38" x 1.38" (3.5 cm x 3.5 cm) |
| Price at introduction | $316 |
| |
| Architecture / Microarchitecture |
| Processor core | Merom |
| Manufacturing process | 0.065 micron |
| Data width | 64 bit |
| Number of cores | 2 |
| Floating Point Unit | Integrated |
| Level 1 cache size ? | 2 x 32 KB instruction caches
2 x 32 KB write-back data caches |
| Level 2 cache size ? | shared 4 MB |
| Features | - MMX instruction set
- SSE
- SSE2
- SSE3
- Supplemental SSE3
- EM64T technology ?
- Execute Disable Bit technology
- Virtualization Technology
- Dynamic Acceleration technology
|
| Low power features | - Stop Grant mode ?
- Sleep mode ?
- Deep Sleep mode ?
- Deeper Sleep mode
- Enhanced Deeper Sleep mode
- Dynamic Cache sizing
- Enhanced SpeedStep technology ?
- Dynamic FSB frequency switching
|
| |
| Electrical/Thermal parameters |
| V core (V) ? | 0.9 - 1.2 |
| Min/Max operating temperature (°C) ? | 0 - 100 |
| Min/Max power dissipation (W) ? | 3.3 (Enhanced Deeper Sleep mode) / 27.6 |
| Thermal Design Power (W) ? | 17 |
| |
| Notes on Intel LE80537LG0254M |
- Bus frequency is 200 MHz. Because the processor uses Quad Data Rate bus the effective bus speed is 800 MHz
- Part LE80537LG0254M is an OEM processor
|
