Intel Core 2 Duo Mobile T5200 LF80537GE0252M

CPU Information

General information
TypeCPU / Microprocessor
FamilyIntel Core 2 Duo Mobile
Model number  ? T5200
CPU part numberLF80537GE0252M (QTRJ, SL9VP)
Frequency (MHz)  ? 1600
Bus speed (MHz)  ? 533
Clock multiplier  ? 12
Package478-pin micro-FCPGA
1.38" x 1.38" (3.5 cm x 3.5 cm)
SocketSocket M
 
Architecture / Microarchitecture
Processor coreMerom
Core steppingB2 (QTRJ, SL9VP)
Manufacturing process0.065 micron
Data width64 bit
Number of cores2
Floating Point UnitIntegrated
Level 1 cache size  ? 2 x 32 KB instruction caches
2 x 32 KB write-back data caches
Level 2 cache size  ? shared 2 MB
Features
  • MMX instruction set
  • SSE
  • SSE2
  • SSE3
  • Supplemental SSE3
  • EM64T technology  ? 
  • Execute Disable Bit technology  ? 
Low power features
  • Stop Grant mode  ? 
  • Sleep mode  ? 
  • Deep Sleep mode  ? 
  • Deeper Sleep mode  ? 
  • Enhanced Deeper Sleep mode  ? 
  • Dynamic Cache sizing  ? 
  • Enhanced SpeedStep technology  ? 
 
Electrical/Thermal parameters
Minimum/Maximum operating temperature (°C)  ? 0 - 100
Thermal Design Power (W)  ? 34
 
Notes on Intel LF80537GE0252M
  • Bus frequency is 133 MHz. Because the processor uses Quad Data Rate bus the effective bus speed is 533 MHz

Pictures (2)

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Intel Core 2 Duo Mobile T5200 LF80537GE0252M
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Intel Core 2 Duo Mobile T5200 LF80537GE0252M

Benchmarks

Tested processor
S-spec number:SL9VP
CPU ID:06F6h
CPU vendor string:GenuineIntel
CPU name string:Intel(R) Core(TM)2 CPU T5200 @ 1.60GHz
 
Motherboard AOpen i975Xa-YDG
3DMark03 CPU score801
3DMark03 game score3232
3DMark2001 score10507
7Zip compressing/decompressing speed1349
CINEBENCH R10 CPU score3003
CINEBENCH R10 CPU score (1 core)1598
CINEBENCH R10 OpenGL score1996
CINEBENCH R10 render time (seconds)294.5
Dhrystone 2.1 (VAX MIPS)2673.18
Doom 1.9s high detail (FPS)139.35
Doom 1.9s low detail (FPS)224.07
Euler3D0.6
Linpack 100x100 (MFLOPS)998.67
PCMark2002 CPU score6315
PCMark2002 Memory score12124
Sandra Dhrystone (MIPS)18838.3
Sandra MultiMedia Floating Point (it/s)47440.7
Sandra MultiMedia Integer (it/s)42210
Sandra Whetstone (MFLOPS)4744.67
Sandra Whetstone SSE2 (MFLOPS)7115.67
Super PI (1M)37.24
Whetstone (KWIPS)1075.74
WinRAR compressing/decompressing speed570.67
wPrime v1.55 (32M)57.5

CPU ID

NOTE: CPU ID information below was taken from one CPU and may include features that are not present in all different steppings of the Intel Core 2 Duo Mobile T5200 CPU.

Manufacturer:Intel
Family:Core 2 Duo Mobile
Processor Number:T5200
Part number:LF80537GE0252M
S-Spec / Comment:SL9VP
Submitted by:CPU-World
General information
Vendor:GenuineIntel
Processor name (BIOS):Intel(R) Core(TM)2 CPU T5200 @ 1.60GHz
Cores:2
Logical processors:2
Processor type:Original OEM Processor
CPUID signature:6F6
Family: 6 (06h)
Model:15 (0Fh)
Stepping: 6 (06h)
TLB/Cache details:64-byte Prefetching
Data TLB: 4-KB Pages, 4-way set associative, 256 entries
Data TLB: 4-MB Pages, 4-way set associative, 32 entries
Instruction TLB: 2-MB pages, 4-way, 8 entries or 4M pages, 4-way, 4 entries
Instruction TLB: 4-KB Pages, 4-way set associative, 128 entries
L1 Data TLB: 4-KB pages, 4-way set associative, 16 entries
L1 Data TLB: 4-MB pages, 4-way set associative, 16 entries

Cache: L1 data L1 instruction L2
Size: 32 KB 32 KB 2 MB
Associativity: 8-way set
associative
8-way set
associative
8-way set
associative
Line size: 64 bytes 64 bytes 64 bytes
 
Instruction set extensionsAdditonal instructions
MMX CLFLUSH
SSE CMOV
SSE2 CMPXCHG16B
SSE3 CMPXCHG8B
SSSE3 FXSAVE/FXRSTORE
  MONITOR/MWAIT
  SYSENTER/SYSEXIT
 
Major featuresOther features
On-chip Floating Point Unit 36-bit page-size extensions
64-bit / Intel 64 64-bit debug store
NX bit/XD-bit Advanced programmable interrupt controller
Enhanced SpeedStep CPL qualified debug store
  Debug store
  Debugging extensions
  LAHF/SAHF support in 64-bit mode
  Machine check architecture
  Machine check exception
  Memory-type range registers
  Model-specific registers
  Page attribute table
  Page global extension
  Page-size extensions (4MB pages)
  Pending break enable
  Perfmon and Debug capability
  Physical address extensions
  Self-snoop
  Thermal monitor
  Thermal monitor and software controlled clock facilities
  Time stamp counter
  Virtual 8086-mode enhancements
  xTPR Update Control

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