Intel Core 2 Duo Mobile T7100 LF80537GG0332M (BX80537T7100)

CPU Information

General information
TypeCPU / Microprocessor
FamilyIntel Core 2 Duo Mobile
Model number  ? T7100
CPU part numberLF80537GG0332M (Q3NF, QLFC, QOYX, QWOY, QYJV, SLA4A)
Box part numberBX80537T7100 (SLA4A)
Frequency (MHz)  ? 1800
Bus speed (MHz)  ? 800
Clock multiplier  ? 9
Package478-pin micro-FCPGA
1.38" x 1.38" (3.5 cm x 3.5 cm)
SocketSocket P
Price at introduction$209
 
Architecture / Microarchitecture
Processor coreMerom
Core steppingM0 (QWOY, SLA4A)
Manufacturing process0.065 micron
Data width64 bit
Number of cores2
Floating Point UnitIntegrated
Level 1 cache size  ? 2 x 32 KB instruction caches
2 x 32 KB write-back data caches
Level 2 cache size  ? shared 2 MB
Features
  • MMX instruction set
  • SSE
  • SSE2
  • SSE3
  • Supplemental SSE3
  • EM64T technology  ? 
  • Execute Disable Bit technology  ? 
  • Virtualization Technology
  • Dynamic Acceleration technology  ? 
Low power features
  • Stop Grant mode  ? 
  • Sleep mode  ? 
  • Deep Sleep mode  ? 
  • Deeper Sleep mode  ? 
  • Enhanced Deeper Sleep mode  ? 
  • Dynamic Cache sizing  ? 
  • Enhanced SpeedStep technology  ? 
  • Dynamic FSB frequency switching  ? 
 
Electrical/Thermal parameters
V core (V)  ? 1.0375 - 1.3
Minimum/Maximum operating temperature (°C)  ? 0 - 100
Minimum/Maximum power dissipation (W)  ? 7.1 (Enhanced Deeper Sleep mode) / 53.3
Thermal Design Power (W)  ? 35
 
Notes on Intel LF80537GG0332M
  • Bus frequency is 200 MHz. Because the processor uses Quad Data Rate bus the effective bus speed is 800 MHz

Pictures (2)

Intel Core 2 Duo Mobile T7100 CPU
2009-09-04 22:27:21
Posted by: gshv

 
Intel Core 2 Duo Mobile T7100 CPU
 
2009-09-04 22:26:56
Posted by: gshv

 
 

Benchmarks

Tested processor
S-spec number:SLA4A
CPU ID:06FDh
CPU vendor string:GenuineIntel
CPU name string:Intel(R) Core(TM)2 Duo CPU T7100 @ 1.80GHz
 
Motherboard MSI Fuzzy GM965 (MS-9803 V1.0)
3DMark03 CPU score1003
3DMark03 game score3269
3DMark2001 score11126
7Zip compressing/decompressing speed1680
CINEBENCH R10 CPU score3464
CINEBENCH R10 CPU score (1 core)1826
CINEBENCH R10 OpenGL score2225
CINEBENCH R10 render time (seconds)255.3
Dhrystone 2.1 (VAX MIPS)3013.4
Doom 1.9s high detail (FPS)161.32
Doom 1.9s low detail (FPS)257.55
Euler3D0.93
Linpack 100x100 (MFLOPS)1122.77
PCMark2002 CPU score7113
PCMark2002 Memory score15061
Sandra Dhrystone (MIPS)21633
Sandra MultiMedia Floating Point (it/s)53358
Sandra MultiMedia Integer (it/s)47496.3
Sandra Whetstone (MFLOPS)5445
Sandra Whetstone SSE2 (MFLOPS)8040.67
Super PI (1M)30.59
Whetstone (KWIPS)1213.68
WinRAR compressing/decompressing speed923
wPrime v1.55 (32M)51.19

CPU ID

NOTE: CPU ID information below was taken from one CPU and may include features that are not present in all different steppings of the Intel Core 2 Duo Mobile T7100 CPU.

Manufacturer:Intel
Family:Core 2 Duo Mobile
Processor Number:T7100
Part number:LF80537GG0332M
S-Spec / Comment:SLA4A
Submitted by:CPU-World
General information
Vendor:GenuineIntel
Processor name (BIOS):Intel(R) Core(TM)2 Duo CPU T7100 @ 1.80GHz
Cores:2
Logical processors:2
Processor type:Original OEM Processor
CPUID signature:6FD
Family: 6 (06h)
Model:15 (0Fh)
Stepping:13 (0Dh)
TLB/Cache details:64-byte Prefetching
Data TLB: 4-KB Pages, 4-way set associative, 256 entries
Data TLB: 4-MB Pages, 4-way set associative, 32 entries
Instruction TLB: 2-MB pages, 4-way, 8 entries or 4M pages, 4-way, 4 entries
Instruction TLB: 4-KB Pages, 4-way set associative, 128 entries
L1 Data TLB: 4-KB pages, 4-way set associative, 16 entries
L1 Data TLB: 4-MB pages, 4-way set associative, 16 entries

Cache: L1 data L1 instruction L2
Size: 32 KB 32 KB 2 MB
Associativity: 8-way set
associative
8-way set
associative
8-way set
associative
Line size: 64 bytes 64 bytes 64 bytes
 
Instruction set extensionsAdditonal instructions
MMX CLFLUSH
SSE CMOV
SSE2 CMPXCHG16B
SSE3 CMPXCHG8B
SSSE3 FXSAVE/FXRSTORE
  MONITOR/MWAIT
  SYSENTER/SYSEXIT
 
Major featuresOther features
On-chip Floating Point Unit 36-bit page-size extensions
64-bit / Intel 64 64-bit debug store
NX bit/XD-bit Advanced programmable interrupt controller
Intel Virtualization CPL qualified debug store
Enhanced SpeedStep Debug store
  Debugging extensions
  LAHF/SAHF support in 64-bit mode
  Machine check architecture
  Machine check exception
  Memory-type range registers
  Model-specific registers
  Page attribute table
  Page global extension
  Page-size extensions (4MB pages)
  Pending break enable
  Perfmon and Debug capability
  Physical address extensions
  Self-snoop
  Thermal monitor
  Thermal monitor and software controlled clock facilities
  Time stamp counter
  Virtual 8086-mode enhancements
  xTPR Update Control

Comments (1)

Stepping

2010-03-20 18:23:51
Posted by: .NetRolller 3D

According to the Compal IFL9x CPU support list, this has a stepping of B1.

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