Intel Core 2 Duo Mobile T7200 LF80537GF0414M (BX80537T7200)

CPU Information

General information
TypeCPU / Microprocessor
FamilyIntel Core 2 Duo Mobile
Model number  ? T7200
Part numberLF80537GF0414M
BX80537T7200 s-specSL9SF
LF80537GF0414M s-specsQJEC   QLZX   QOLP   QTCI   SL9SF
Frequency (MHz)  ? 2000
Bus speed (MHz)  ? 667
Clock multiplier  ? 12
Package478-pin micro-FCPGA
1.38" x 1.38" (3.5 cm x 3.5 cm)
SocketSocket M
Introduction dateAug 28, 2006
Price at introduction$294
 
Architecture / Microarchitecture
Processor coreMerom
Manufacturing process0.065 micron
Data width64 bit
Number of cores2
Floating Point UnitIntegrated
Level 1 cache size  ? 2 x 32 KB instruction caches
2 x 32 KB write-back data caches
Level 2 cache size  ? shared 4 MB
Features
  • MMX instruction set
  • SSE
  • SSE2
  • SSE3
  • Supplemental SSE3
  • EM64T technology  ? 
  • Execute Disable Bit technology  ? 
  • Virtualization Technology
Low power features
  • Stop Grant mode  ? 
  • Sleep mode  ? 
  • Deep Sleep mode  ? 
  • Deeper Sleep mode  ? 
  • Enhanced Deeper Sleep mode  ? 
  • Dynamic Cache sizing  ? 
  • Enhanced SpeedStep technology  ? 
 
Electrical/Thermal parameters
V core (V)  ? 1.0375 - 1.3
Min/Max operating temperature (°C)  ? 0 - 100
Max power dissipation (W)  ? 53.3
Thermal Design Power (W)  ? 34
 
Notes on Intel LF80537GF0414M
  • Bus frequency is 166 MHz. Because the processor uses Quad Data Rate bus the effective bus speed is 667 MHz
  • Part LF80537GF0414M is an OEM processor
  • Part BX80537T7200 is a boxed (retail) processor

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Benchmarks

Tested processor
S-spec number:SL9SF
CPU ID:06F6h
CPU vendor string:GenuineIntel
CPU name string:Intel(R) Core(TM)2 CPU T7200 @ 2.00GHz
 
Motherboard AOpen i975Xa-YDG
3DMark2001 score10724
7Zip compressing/decompressing speed1841
CINEBENCH R10 CPU score3864
CINEBENCH R10 CPU score (1 core)2039
CINEBENCH R10 OpenGL score2236
CINEBENCH R10 render time (seconds)228.9
Dhrystone 2.1 (VAX MIPS)3337.06
Doom 1.9s high detail (FPS)163.08
Doom 1.9s low detail (FPS)259.65
Euler3D0.78
Linpack 100x100 (MFLOPS)1243.89
PCMark2002 CPU score7893
PCMark2002 Memory score24595
Sandra Dhrystone (MIPS)24006.3
Sandra MultiMedia Floating Point (it/s)59248
Sandra MultiMedia Integer (it/s)52750
Sandra Whetstone (MFLOPS)6046
Sandra Whetstone SSE2 (MFLOPS)8930.67
Super PI (1M)25.52
Whetstone (KWIPS)1352.35
WinRAR compressing/decompressing speed568
wPrime v1.55 (32M)45.66

CPU ID

NOTE: CPU ID information below was taken from one CPU and may include features that are not present in all different steppings of the Intel Core 2 Duo Mobile T7200 CPU.

Manufacturer:Intel
Family:Core 2 Duo Mobile
Model / Processor Number:T7200
Part number:LF80537GF0414M
S-Spec / Comment:SL9SF
Submitted by:CPU-World
General information
Vendor:GenuineIntel
Processor name:Intel(R) Core(TM)2 CPU T7200 @ 2.00GHz
Cores:2
Logical processors:2
Processor type:Original OEM Processor
CPUID signature:6F6
Family: 6 (06h)
Model:15 (0Fh)
Stepping: 6 (06h)
TLB/Cache details:3rd-level cache: 4-MB, 16-way set associative, 64-byte line size (Intel Xeon processor MP, Family 0Fh, Model 06h), 2nd-level cache: 4-MB, 16-way set associative, 64-byte line size
64-byte Prefetching
Data TLB: 4-KB Pages, 4-way set associative, 256 entries
Data TLB: 4-MB Pages, 4-way set associative, 32 entries
Instruction TLB: 2-MB pages, 4-way, 8 entries or 4M pages, 4-way, 4 entries
Instruction TLB: 4-KB Pages, 4-way set associative, 128 entries
L1 Data TLB: 4-KB pages, 4-way set associative, 16 entries
L1 Data TLB: 4-MB pages, 4-way set associative, 16 entries

Cache: L1 (data) L1 (instruction) L2
Size: 32 KB 32 KB 4 MB
Associativity: 8-way set associative 8-way set associative 16-way set associative
Line size: 64 bytes 64 bytes 64 bytes
 
Instruction set extensionsAdditonal instructions
MMX CLFLUSH
SSE CMOV
SSE2 CMPXCHG16B
SSE3 CMPXCHG8B
SSSE3 FXSAVE/FXRSTORE
  MONITOR/MWAIT
  SYSENTER/SYSEXIT
 
Major featuresOther features
On-chip Floating Point Unit 36-bit page-size extensions
64-bit / Intel 64 64-bit debug store
NX bit/XD-bit Advanced programmable interrupt controller
Intel Virtualization CPL qualified debug store
Enhanced SpeedStep Debug store
  Debugging extensions
  LAHF/SAHF support in 64-bit mode
  Machine check architecture
  Machine check exception
  Memory-type range registers
  Model-specific registers
  Page attribute table
  Page global extension
  Page-size extensions (4MB pages)
  Pending break enable
  Perfmon and Debug capability
  Physical address extensions
  Self-snoop
  Thermal monitor
  Thermal monitor and software controlled clock facilities
  Time stamp counter
  Virtual 8086-mode enhancements
  xTPR Update Control

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