| General information |
| Type | CPU / Microprocessor |
| Family | Intel Core 2 Duo Mobile |
| Model number ? | T7250 |
| CPU part number | LE80537GG0412M (QWOE, SLA3T) |
| Frequency (MHz) ? | 2000 |
| Bus speed (MHz) ? | 800 |
| Clock multiplier ? | 10 |
| Package | 479-ball micro-FCBGA
1.38" x 1.38" (3.5 cm x 3.5 cm) |
| Introduction date | Sep 5, 2007 |
| Price at introduction | $209 |
| |
| Architecture / Microarchitecture |
| Processor core | Merom |
| Core stepping | M0 (QWOE, SLA3T) |
| Manufacturing process | 0.065 micron |
| Data width | 64 bit |
| Number of cores | 2 |
| Floating Point Unit | Integrated |
| Level 1 cache size ? | 2 x 32 KB instruction caches
2 x 32 KB write-back data caches |
| Level 2 cache size ? | shared 2 MB |
| Features | - MMX instruction set
- SSE
- SSE2
- SSE3
- Supplemental SSE3
- EM64T technology ?
- Execute Disable Bit technology ?
- Virtualization Technology
- Dynamic Acceleration technology ?
|
| Low power features | - Stop Grant mode ?
- Sleep mode ?
- Deep Sleep mode ?
- Deeper Sleep mode ?
- Enhanced Deeper Sleep mode ?
- Dynamic Cache sizing ?
- Enhanced SpeedStep technology ?
- Dynamic FSB frequency switching ?
|
| |
| Electrical/Thermal parameters |
| V core (V) ? | 1.0375 - 1.3 |
| Minimum/Maximum operating temperature (°C) ? | 0 - 100 |
| Minimum/Maximum power dissipation (W) ? | 7.1 (Enhanced Deeper Sleep mode) / 53.3 |
| Thermal Design Power (W) ? | 35 |
| |
| Notes on Intel LE80537GG0412M |
- Bus frequency is 200 MHz. Because the processor uses Quad Data Rate bus the effective bus speed is 800 MHz
|
