|
Intel Core 2 Duo Mobile T9550 AV80576GH0676MG
Specifications
| General information |
| Type | CPU / Microprocessor |
| Market segment | Mobile |
| Family | Intel Core 2 Duo Mobile |
| Model number ? | T9550 |
| CPU part number | AV80576GH0676MG is an OEM/tray microprocessor |
| Frequency (MHz) ? | 2667 |
| Bus speed (MHz) ? | 1066 |
| Clock multiplier ? | 10 |
| Package | 479-ball micro-FCBGA
1.38" x 1.38" (3.5 cm x 3.5 cm) |
| Socket | BGA479 |
| Introduction date | Dec 28, 2008 |
| End-of-Life date | Last order date is April 29, 2011
Last shipment date is October 14, 2011 |
| Price at introduction | $316 |
| | | S-spec numbers |
| |
Production processors |
| Part number |
SLGEL |
| AV80576GH0676MG | + |
|
| | | Architecture / Microarchitecture |
| Microarchitecture | Core |
| Platform | Montevina
MontevinaPlus |
| Processor core ? | Penryn |
| Core stepping ? | E0 (SLGEL) |
| CPUID | 10676 (SLGEL) |
| Manufacturing process | 0.045 micron |
| Data width | 64 bit |
| The number of cores | 2 |
| The number of threads | 2 |
| Floating Point Unit | Integrated |
| Level 1 cache size ? | 2 x 32 KB instruction caches
2 x 32 KB write-back data caches |
| Level 2 cache size ? | shared 6 MB |
| Features | - MMX instruction set
- SSE
- SSE2
- SSE3
- Supplemental SSE3
- SSE4.1 ?
- EM64T technology ?
- Execute Disable Bit technology ?
- Virtualization Technology ?
- Dynamic Acceleration technology ?
- Intel Trusted Execution technology
|
| Low power features | - C1/AutoHALT, C1/MWAIT, C2, C3, C4 (with Enhanced Deep Sleep) and C6 core states
- Stop Grant mode ?
- Sleep mode ?
- Deep Sleep mode ?
- Deeper Sleep mode ?
- Enhanced Deeper Sleep mode ?
- Deep Power-Down state ?
- Dynamic FSB Frequency switching ?
- Enhanced SpeedStep technology ?
|
| | | Electrical/Thermal parameters |
| V core (V) ? | 1 - 1.25 |
| Minimum/Maximum operating temperature (°C) ? | 0 - 105 |
| Minimum/Maximum power dissipation (W) ? | 16.54 (Deeper Sleep mode) / 57.07 |
| Thermal Design Power (W) ? | 35 |
| |
| Notes on Intel AV80576GH0676MG |
- Bus frequency is 266 MHz. Because the processor uses Quad Data Rate bus the effective bus speed is 1066 MHz
- Processor operates at 0.85 Volt - 1.1 Volt in Low Frequency mode
- Processor operates at 0.75 Volt - 0.95 Volt in Super Low Frequency mode
|
CPUs, related to Intel Core 2 Duo T9550 (BGA)
| Model |
Cores / Threads |
Freq. |
L2 cache |
TDP |
Features |
| Intel Core 2 Duo Mobile family, BGA479 |
| Intel Core 2 Duo P8600 (BGA) | 2 / 2 | 2.4 GHz | 3 MB | 25 Watt | SSE4, NX, VT, TXT, ESS, TBT |
| Intel Core 2 Duo T7700 (BGA) | 2 / 2 | 2.4 GHz | 4 MB | 35 Watt | SSE4, NX, VT, TXT, ESS, TBT |
| Intel Core 2 Duo P8700 (BGA) | 2 / 2 | 2.53 GHz | 3 MB | 25 Watt | SSE4, NX, VT, TXT, ESS, TBT |
| Intel Core 2 Duo T7800 (BGA) | 2 / 2 | 2.6 GHz | 4 MB | 35 Watt | SSE4, NX, VT, TXT, ESS, TBT |
| Intel Core 2 Duo P8800 (BGA) | 2 / 2 | 2.66 GHz | 3 MB | 25 Watt | SSE4, NX, VT, TXT, ESS, TBT |
| Intel Core 2 Duo T9300 (BGA) | 2 / 2 | 2.5 GHz | 6 MB | 35 Watt | SSE4, NX, VT, TXT, ESS, TBT |
| Intel Core 2 Duo T9400 (BGA) | 2 / 2 | 2.53 GHz | 6 MB | 35 Watt | SSE4, NX, VT, TXT, ESS, TBT |
| Intel Core 2 Duo T9500 (BGA) | 2 / 2 | 2.6 GHz | 6 MB | 35 Watt | SSE4, NX, VT, TXT, ESS, TBT |
| Intel Core 2 Duo T9600 (BGA) | 2 / 2 | 2.8 GHz | 6 MB | 35 Watt | SSE4, NX, VT, TXT, ESS, TBT |
| Intel Core 2 Duo T9900 (BGA) | 2 / 2 | 3.06 GHz | 6 MB | 35 Watt | SSE4, NX, VT, TXT, ESS, TBT |
| Intel Core 2 Duo Mobile family, Core micro-architecture, Other sockets |
| Intel Core 2 Duo P9700 | 2 / 2 | 2.8 GHz | 6 MB | 28 Watt | SSE4, NX, VT, TXT, ESS, TBT |
| Intel Core 2 Duo T9600 (Socket P) | 2 / 2 | 2.8 GHz | 6 MB | 35 Watt | SSE4, NX, VT, TXT, ESS, TBT |
| Intel Core 2 Duo E8335 | 2 / 2 | 2.93 GHz | 6 MB | | SSE4, NX, VT, TXT, ESS, TBT |
| Intel Core 2 Duo T9800 | 2 / 2 | 2.93 GHz | 6 MB | 35 Watt | SSE4, NX, VT, TXT, ESS, TBT |
| Intel Core 2 Duo E8435 | 2 / 2 | 3.06 GHz | 6 MB | | SSE4, NX, VT, TXT, ESS, TBT |
| Intel Core 2 Duo T9900 (Socket P) | 2 / 2 | 3.06 GHz | 6 MB | 35 Watt | SSE4, NX, VT, TXT, ESS, TBT |
| Other families, Core micro-architecture, BGA479 |
| Intel Celeron M 573 | 1 / 1 | 1 GHz | 512 KB | 10 Watt | SSE4, NX, VT, TXT, ESS, TBT |
| Intel Core 2 Solo U2100 | 1 / 1 | 1.06 GHz | 1 MB | 5.5 Watt | SSE4, NX, VT, TXT, ESS, TBT |
| Intel Core 2 Solo U2200 | 1 / 1 | 1.2 GHz | 1 MB | 5.5 Watt | SSE4, NX, VT, TXT, ESS, TBT |
| Intel Celeron M 530 (BGA) | 1 / 1 | 1.73 GHz | 1 MB | 31 Watt | SSE4, NX, VT, TXT, ESS, TBT |
| Intel Celeron M 550 (BGA) | 1 / 1 | 2 GHz | 1 MB | 31 Watt | SSE4, NX, VT, TXT, ESS, TBT |
| Intel Mobile Celeron T3100 (BGA) | 2 / 2 | 1.9 GHz | 1 MB | 35 Watt | SSE4, NX, VT, TXT, ESS, TBT |
• Highlighted numbers and features indicate whether specific processor performs better or worse than Core 2 Duo T9550 (BGA)
• Within each category, the CPUs are sorted from slower (at the top) to faster (at the bottom)
• List of related CPUs is not complete.
• Features abbreviations:
SSE4 - SSE4 instructions NX - Virus Protection / Execute Disable bit VT - Virtualization TXT - Trusted Execution ESS - PowerNow! / Enhanced SpeedStep TBT - Dynamic Acceleration / Turbo Boost
News
Jun 09, 2010: Recently Engadget posted slides from a leaked Intel mobile
processors roadmap, covering the second half of this year and the first
half of the next year. That document contained not only information
about future new mobile processors, but also useful data on
discontinued Core 2 Mobile CPUs.
CPU ID (1)
NOTE: CPU ID information below was taken from one CPU and
may include features that are not present in all different steppings of the
Intel Core 2 Duo Mobile T9550 CPU.
| Manufacturer: | Intel |
| CPU Family: | Core 2 Duo Mobile |
| Processor Number: | T9550 |
| Frequency: | 2660 MHz |
|
| Part number: | AV80576GH0676MG |
| S-Spec Number: | |
| Comment: | IBM Thinkpad T500, Stepping 6 7 A |
| Submitted by: | Rolf |
|
| General information |
| Vendor: | GenuineIntel |
| Processor name (BIOS): | Intel(R) Core(TM)2 Duo CPU T9550 @ 2.66GHz |
| Cores: | 2 |
| Logical processors: | 2 |
| Processor type: | Original OEM Processor |
| CPUID signature: | 1067A |
| Family: | 6 (06h) |
| Model: | 23 (017h) |
| Stepping: | 10 (0Ah) |
| TLB/Cache details: | 64-byte Prefetching
Data TLB: 4-KB Pages, 4-way set associative, 256 entries
Data TLB: 4-MB Pages, 4-way set associative, 32 entries
Instruction TLB: 2-MB pages, 4-way, 8 entries or 4M pages, 4-way, 4 entries
Instruction TLB: 4-KB Pages, 4-way set associative, 128 entries
L1 Data TLB: 4-KB pages, 4-way set associative, 16 entries
L1 Data TLB: 4-MB pages, 4-way set associative, 16 entries |
| Cache: |
L1 data |
L1 instruction |
L2 |
| Size: |
2 x 32 KB |
2 x 32 KB |
6 MB |
| Associativity: |
8-way set associative |
8-way set associative |
24-way set associative |
| Line size: |
64 bytes |
64 bytes |
64 bytes |
| Comments: |
|
|
Shared between all cores |
| |
| Instruction set extensions | Additional instructions |
| MMX |
CLFLUSH |
| SSE |
CMOV |
| SSE2 |
CMPXCHG16B |
| SSE3 |
CMPXCHG8B |
| SSSE3 |
FXSAVE/FXRSTORE |
| SSE4.1 |
MONITOR/MWAIT |
| |
SYSENTER/SYSEXIT |
| |
XSAVE/XRESTORE states |
| |
XSETBV/XGETBV are enabled |
| |
| Major features | Other features |
| On-chip Floating Point Unit |
36-bit page-size extensions |
| 64-bit / Intel 64 |
64-bit debug store |
| NX bit/XD-bit |
Advanced programmable interrupt controller |
| Intel Virtualization |
CPL qualified debug store |
| Intel Trusted Execution technology |
Debug store |
| Turbo Boost |
Debugging extensions |
| Enhanced SpeedStep |
Digital Thermal Sensor capability |
| |
LAHF/SAHF support in 64-bit mode |
| |
Machine check architecture |
| |
Machine check exception |
| |
Memory-type range registers |
| |
Model-specific registers |
| |
Page attribute table |
| |
Page global extension |
| |
Page-size extensions (4MB pages) |
| |
Pending break enable |
| |
Perfmon and Debug capability |
| |
Physical address extensions |
| |
Self-snoop |
| |
Thermal monitor |
| |
Thermal monitor 2 |
| |
Thermal monitor and software controlled clock facilities |
| |
Time stamp counter |
| |
Virtual 8086-mode enhancements |
| |
xTPR Update Control |
|
Find CPUs
Find Core 2 Duo Mobile CPUs with:
|