CPU Information
| General information |
| Type | CPU / Microprocessor |
| Family | Intel Core 2 Extreme Mobile |
| Model number ? | X7900 |
| CPU part number | LF80537GG0724M (QVVF, QZDX, SLA33) |
| Frequency (MHz) ? | 2800 |
| Bus speed (MHz) ? | 800 |
| Clock multiplier ? | 14 |
| Package | 478-pin micro-FCPGA
1.38" x 1.38" (3.5 cm x 3.5 cm) |
| Socket | Socket P |
| Introduction date | Aug 22, 2007 |
| Price at introduction | $851 |
| | | Architecture / Microarchitecture |
| Core steppings | E1 (QVVF, SLA33)
G0 (QZDX) |
| Manufacturing process | 0.065 micron |
| Data width | 64 bit |
| Number of cores | 2 |
| Floating Point Unit | Integrated |
| Level 1 cache size ? | 2 x 32 KB instruction caches
2 x 32 KB write-back data caches |
| Level 2 cache size ? | shared 4 MB |
| Features | - MMX instruction set
- SSE
- SSE2
- SSE3
- Supplemental SSE3
- EM64T technology ?
- Execute Disable Bit technology ?
- Virtualization Technology
- Dynamic Acceleration technology ?
|
| Low power features | - Stop Grant mode ?
- Sleep mode ?
- Deep Sleep mode ?
- Deeper Sleep mode ?
- Enhanced Deeper Sleep mode ?
- Dynamic Cache sizing ?
- Enhanced SpeedStep technology ?
- Dynamic FSB frequency switching ?
|
| | | Electrical/Thermal parameters |
| V core (V) ? | 1.1 - 1.375 |
| Minimum/Maximum operating temperature (°C) ? | 0 - 100 |
| Minimum/Maximum power dissipation (W) ? | 11.5 (Enhanced Deeper Sleep mode) / 75.6 |
| Thermal Design Power (W) ? | 44 |
| |
| Notes on Intel LF80537GG0724M |
- Bus frequency is 200 MHz. Because the processor uses Quad Data Rate bus the effective bus speed is 800 MHz
|
Pictures (1)
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| Core 2 Extreme Mobile X7900 CPU |
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Engineering sample. |
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Benchmarks
| Tested processor |
| S-spec number: | QZDX |
| CPU ID: | 06FBh |
| CPU vendor string: | GenuineIntel |
| CPU name string: | Intel(R) Core(TM)2 Extreme CPU X7900 @ 2.80GHz |
| |
| Motherboard MSI Fuzzy GM965 (MS-9803 V1.0) |
| 3DMark03 CPU score | 1390 |
| 3DMark03 game score | 3284 |
| 3DMark2001 score | 11746 |
| 7Zip compressing/decompressing speed | 2496 |
| CINEBENCH R10 CPU score | 5475 |
| CINEBENCH R10 CPU score (1 core) | 2859 |
| CINEBENCH R10 OpenGL score | 2575 |
| CINEBENCH R10 render time (seconds) | 161.5 |
| Dhrystone 2.1 (VAX MIPS) | 4668.65 |
| Doom 1.9s high detail (FPS) | 162.96 |
| Doom 1.9s low detail (FPS) | 262.38 |
| Euler3D | 1.24 |
| Linpack 100x100 (MFLOPS) | 1102.4 |
| PCMark2002 CPU score | 11061 |
| PCMark2002 Memory score | 34738 |
| Sandra Dhrystone (MIPS) | 33525 |
| Sandra MultiMedia Floating Point (it/s) | 83064.3 |
| Sandra MultiMedia Integer (it/s) | 73959.7 |
| Sandra Whetstone (MFLOPS) | 8473 |
| Sandra Whetstone SSE2 (MFLOPS) | 12508.7 |
| Super PI (1M) | 19.17 |
| Whetstone (KWIPS) | 1911.56 |
| WinRAR compressing/decompressing speed | 1139.33 |
| wPrime v1.55 (32M) | 32.61 |
CPU ID
NOTE: CPU ID information below was taken from one CPU and
may include features that are not present in all different steppings of the
Intel Core 2 Extreme Mobile X7900 CPU.
| Manufacturer: | Intel |
| Family: | Core 2 Extreme Mobile |
| Model / Processor Number: | X7900 |
|
| Part number: | LF80537GG0724M |
| S-Spec / Comment: | QZDX |
| Submitted by: | CPU-World |
|
| General information |
|---|
| Vendor: | GenuineIntel |
| Processor name (BIOS): | Intel(R) Core(TM)2 Extreme CPU X7900 @ 2.80GHz |
| Cores: | 2 |
| Logical processors: | 2 |
| Processor type: | Original OEM Processor |
| CPUID signature: | 6FB |
| Family: | 6 (06h) |
| Model: | 15 (0Fh) |
| Stepping: | 11 (0Bh) |
| TLB/Cache details: | 3rd-level cache: 4-MB, 16-way set associative, 64-byte line size (Intel Xeon processor MP, Family 0Fh, Model 06h), 2nd-level cache: 4-MB, 16-way set associative, 64-byte line size
64-byte Prefetching
Data TLB: 4-KB Pages, 4-way set associative, 256 entries
Data TLB: 4-MB Pages, 4-way set associative, 32 entries
Instruction TLB: 2-MB pages, 4-way, 8 entries or 4M pages, 4-way, 4 entries
Instruction TLB: 4-KB Pages, 4-way set associative, 128 entries
L1 Data TLB: 4-KB pages, 4-way set associative, 16 entries
L1 Data TLB: 4-MB pages, 4-way set associative, 16 entries |
| Cache: |
L1 (data) |
L1 (instruction) |
L2 |
|---|
| Size: |
32 KB |
32 KB |
4 MB |
| Associativity: |
8-way set associative |
8-way set associative |
16-way set associative |
| Line size: |
64 bytes |
64 bytes |
64 bytes |
| |
| Instruction set extensions | Additonal instructions |
|---|
| MMX |
CLFLUSH |
| SSE |
CMOV |
| SSE2 |
CMPXCHG16B |
| SSE3 |
CMPXCHG8B |
| SSSE3 |
FXSAVE/FXRSTORE |
| |
MONITOR/MWAIT |
| |
SYSENTER/SYSEXIT |
| |
| Major features | Other features |
|---|
| On-chip Floating Point Unit |
36-bit page-size extensions |
| 64-bit / Intel 64 |
64-bit debug store |
| NX bit/XD-bit |
Advanced programmable interrupt controller |
| Intel Virtualization |
CPL qualified debug store |
| Enhanced SpeedStep |
Debug store |
| |
Debugging extensions |
| |
LAHF/SAHF support in 64-bit mode |
| |
Machine check architecture |
| |
Machine check exception |
| |
Memory-type range registers |
| |
Model-specific registers |
| |
Page attribute table |
| |
Page global extension |
| |
Page-size extensions (4MB pages) |
| |
Pending break enable |
| |
Perfmon and Debug capability |
| |
Physical address extensions |
| |
Self-snoop |
| |
Thermal monitor |
| |
Thermal monitor and software controlled clock facilities |
| |
Time stamp counter |
| |
Virtual 8086-mode enhancements |
| |
xTPR Update Control |
|
| Related CPUs |
|---|
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