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Intel Core 2 Quad Q8400 AT80580PJ0674ML (BX80580Q8400 / BXC80580Q8400)
Specifications
| General information |
| Type | CPU / Microprocessor |
| Market segment | Desktop |
| Family | Intel Core 2 Quad |
| Model number ? | Q8400 |
| CPU part numbers | AT80580PJ0674ML is an OEM/tray microprocessor BX80580Q8400 is a boxed microprocessor BXC80580Q8400 is a boxed microprocessor |
| Frequency (MHz) ? | 2667 |
| Bus speed (MHz) ? | 1333 |
| Clock multiplier ? | 8 |
| Package | 775-land Flip-Chip Land Grid Array (FC-LGA8)
1.48" x 1.48" (3.75 cm x 3.75 cm) |
| Socket | Socket 775 (LGA775) |
| Introduction date | Apr 19, 2009 |
| End-of-Life date | Last order date is August 26, 2011
Last shipment date for OEM processors is February 10, 2012 |
| Price at introduction | $183 |
| | | S-spec numbers |
| |
Production processors |
| Part number |
SLGT6 |
| AT80580PJ0674ML | + |
| BX80580Q8400 | + |
| BXC80580Q8400 | + |
|
| | | Architecture / Microarchitecture |
| Microarchitecture | Core |
| Processor core ? | Yorkfield |
| Core stepping ? | R0 (SLGT6) |
| CPUID | 1067A (SLGT6) |
| Manufacturing process | 0.045 micron |
| Data width | 64 bit |
| The number of cores | 4 |
| The number of threads | 4 |
| Floating Point Unit | Integrated |
| Level 1 cache size ? | 4 x 32 KB instruction caches
4 x 32 KB data caches |
| Level 2 cache size ? | 2 x 2 MB 12-way set associative caches (each L2 cache is shared between 2 cores) |
| Multiprocessing | Uniprocessor |
| Features | - MMX instruction set
- SSE
- SSE2
- SSE3
- Supplemental SSE3
- SSE4.1 ?
- EM64T technology ?
- Execute Disable Bit technology ?
- Virtualization Technology ?
|
| Low power features | - Enhanced SpeedStep technology ?
- Stop Grant state ?
- Halt state
- Extended Halt state
- Extended Stop Grant State
- Sleep state ?
- Deep Sleep state ?
- Deeper Sleep state ?
|
| | | Electrical/Thermal parameters |
| V core (V) ? | 0.85 - 1.3625 |
| Minimum/Maximum operating temperature (°C) ? | 5 - 71.4 |
| Thermal Design Power (W) ? | 95 |
| |
| Notes on Intel AT80580PJ0674ML |
- Binary compatible with 32-bit x86 software
- Bus frequency is 333 MHz. Because the processor uses Quad Data Rate bus the effective bus speed is 1333 MHz
- Part AT80580PJ0674ML is manufactured in halide-free package
- BXC80580Q8400 is a Chinese version
|
CPUs, related to Intel Core 2 Quad Q8400
| Model |
Cores / Threads |
Freq. |
L2 cache |
TDP |
Features |
| Intel Core 2 Quad family, Socket 775 |
| Intel Core 2 Quad Q9500 | 4 / 4 | 2.83 GHz | 6 MB | 95 Watt | SSE4, VT, ESS |
| Intel Core 2 Quad Q9505 | 4 / 4 | 2.83 GHz | 6 MB | 95 Watt | SSE4, VT, TXT, ESS |
| Intel Core 2 Quad Q9505S | 4 / 4 | 2.83 GHz | 6 MB | 65 Watt | SSE4, VT, TXT, ESS |
| Intel Core 2 Quad Q9450S | 4 / 4 | 2.66 GHz | 12 MB | 65 Watt | SSE4, VT, ESS |
| Intel Core 2 Quad Q9450 | 4 / 4 | 2.66 GHz | 12 MB | 95 Watt | SSE4, VT, TXT, ESS |
| Intel Core 2 Quad Q9550 | 4 / 4 | 2.83 GHz | 12 MB | 95 Watt | SSE4, VT, TXT, ESS |
| Intel Core 2 Quad Q9550S | 4 / 4 | 2.83 GHz | 12 MB | 65 Watt | SSE4, VT, TXT, ESS |
| Intel Core 2 Quad Q9700 | 4 / 4 | 3.16 GHz | 6 MB | 95 Watt | SSE4, VT, ESS |
| Intel Core 2 Quad Q9705 | 4 / 4 | 3.16 GHz | 6 MB | 95 Watt | SSE4, VT, TXT, ESS |
| Intel Core 2 Quad Q9650 | 4 / 4 | 3 GHz | 12 MB | 95 Watt | SSE4, VT, TXT, ESS |
| Other families, Core micro-architecture, Socket 775 |
| Intel Celeron 440 | 1 / 1 | 2 GHz | 512 KB | 35 Watt | SSE4, VT, ESS |
| Intel Celeron 450 | 1 / 1 | 2.2 GHz | 512 KB | 35 Watt | SSE4, VT, ESS |
| Intel Celeron E3500 | 2 / 2 | 2.7 GHz | 1 MB | 65 Watt | SSE4, VT, ESS |
| Intel Pentium E6800 | 2 / 2 | 3.33 GHz | 2 MB | 65 Watt | SSE4, VT, ESS |
| Intel Core 2 Duo E8500 | 2 / 2 | 3.16 GHz | 6 MB | 65 Watt | SSE4, VT, TXT, ESS |
| Intel Core 2 Duo E8600 | 2 / 2 | 3.33 GHz | 6 MB | 65 Watt | SSE4, VT, TXT, ESS |
| Intel Core 2 Extreme QX9650 | 4 / 4 | 3 GHz | 12 MB | 130 Watt | SSE4, VT, ESS |
| Intel Core 2 Extreme QX9770 | 4 / 4 | 3.2 GHz | 12 MB | 136 Watt | SSE4, VT, ESS |
• Highlighted numbers and features indicate whether specific processor performs better or worse than Core 2 Quad Q8400
• Within each category, the CPUs are sorted from slower (at the top) to faster (at the bottom)
• List of related CPUs is not complete.
• Features abbreviations:
SSE4 - SSE4 instructions VT - Virtualization TXT - Trusted Execution ESS - PowerNow! / Enhanced SpeedStep
News
Feb 08, 2011: Last October, we published a story detailing upcoming
discontinuation of many Core 2 Duo and Core 2 Quad microprocessors,
and two Pentium Dual-core models. Yesterday Intel published Product
Discontinuation Notifications (PDN), that provide End-of-Life
milestone dates for these CPUs.
Oct 05, 2010: In August, Jetway Computer Corporation updated Q3 desktop
motherboard roadmap, and added discontinuance notice for Intel socket
775 microprocessors. As stated by the roadmap document, Product
Discontinuance Notices (PDN) were published for Core i7-975 and
Celeron E3200 CPUs in Q3 2010, and the last order date for these CPUs
is Q1 2011. In the first quarter 2011 Intel plans to issue PDNs for
Core 2 Quad Q8300, Q8400, Q8400S, Q9505, Q9505S, Q9550, Q9550S and
Q9650 CPUs. Discontinuance notices will also be posted for Core 2 Duo
E8500 and E8600 models, and Pentium Dual-Core E5400 processor.
CPU ID (2)
NOTE: CPU ID information below was taken from one CPU and
may include features that are not present in all different steppings of the
Intel Core 2 Quad Q8400 CPU.
| Manufacturer: | Intel |
| CPU Family: | Core 2 Quad |
| Processor Number: | Q8400 |
| Frequency: | 3720 MHz |
|
| Part number: | AT80580PJ0674ML |
| S-Spec Number: | |
| Comment: | |
| Submitted by: | |
|
| General information |
| Vendor: | GenuineIntel |
| Processor name (BIOS): | Intel(R) Core(TM)2 Quad CPU Q8400 @ 2.66GHz |
| Cores: | 4 |
| Logical processors: | 4 |
| Processor type: | Original OEM Processor |
| CPUID signature: | 1067A |
| Family: | 6 (06h) |
| Model: | 23 (017h) |
| Stepping: | 10 (0Ah) |
| TLB/Cache details: | 64-byte Prefetching
Data TLB: 4-KB Pages, 4-way set associative, 256 entries
Data TLB: 4-MB Pages, 4-way set associative, 32 entries
Instruction TLB: 2-MB pages, 4-way, 8 entries or 4M pages, 4-way, 4 entries
Instruction TLB: 4-KB Pages, 4-way set associative, 128 entries
L1 Data TLB: 4-KB pages, 4-way set associative, 16 entries
L1 Data TLB: 4-MB pages, 4-way set associative, 16 entries |
| Cache: |
L1 data |
L1 instruction |
L2 |
| Size: |
4 x 32 KB |
4 x 32 KB |
2 x 2 MB |
| Associativity: |
8-way set associative |
8-way set associative |
8-way set associative |
| Line size: |
64 bytes |
64 bytes |
64 bytes |
| Comments: |
|
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1 cache per 2 cores |
| |
| Instruction set extensions | Additional instructions |
| MMX |
CLFLUSH |
| SSE |
CMOV |
| SSE2 |
CMPXCHG16B |
| SSE3 |
CMPXCHG8B |
| SSSE3 |
FXSAVE/FXRSTORE |
| SSE4.1 |
MONITOR/MWAIT |
| |
SYSENTER/SYSEXIT |
| |
XSAVE/XRESTORE states |
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XSETBV/XGETBV are enabled |
| |
| Major features | Other features |
| On-chip Floating Point Unit |
36-bit page-size extensions |
| 64-bit / Intel 64 |
64-bit debug store |
| NX bit/XD-bit |
Advanced programmable interrupt controller |
| Intel Virtualization |
CPL qualified debug store |
| Enhanced SpeedStep |
Debug store |
| |
Debugging extensions |
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Digital Thermal Sensor capability |
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LAHF/SAHF support in 64-bit mode |
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Machine check architecture |
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Machine check exception |
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Memory-type range registers |
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Model-specific registers |
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Page attribute table |
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Page global extension |
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Page-size extensions (4MB pages) |
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Pending break enable |
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Perfmon and Debug capability |
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Physical address extensions |
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Self-snoop |
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Thermal monitor |
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Thermal monitor 2 |
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Thermal monitor and software controlled clock facilities |
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Time stamp counter |
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Virtual 8086-mode enhancements |
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xTPR Update Control |
Our CPUID database has 2 records for this microprocessor. See all submitted records.
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