| General information |
| Type | CPU / Microprocessor |
| Family | Intel Core 2 Quad |
| Model number ? | Q9450 |
| CPU part number | EU80569PJ067N (Q7UP, SLAWR) |
| Box part number | BX80569Q9450 (SLAWR) |
| Frequency (MHz) ? | 2667 |
| Bus speed (MHz) ? | 1333 |
| Clock multiplier ? | 8 |
| Package | 775-land Flip-Chip Land Grid Array (FC-LGA8)
1.48" x 1.48" (3.75 cm x 3.75 cm) |
| Socket | Socket 775 (LGA775) |
| Introduction date | Jan 7, 2008 |
| Price at introduction | $316 |
| |
| Architecture / Microarchitecture |
| Processor core | Yorkfield |
| Core steppings | C0 (Q7UP)
C1 (SLAWR) |
| Manufacturing process | 0.045 micron |
| Data width | 64 bit |
| Number of cores | 4 |
| Floating Point Unit | Integrated |
| Level 1 cache size ? | 4 x 32 KB instruction caches
4 x 32 KB data caches |
| Level 2 cache size ? | 2 x 6 MB 12-way set associative caches (each L2 cache is shared between 2 cores) |
| Features | - MMX instruction set
- SSE
- SSE2
- SSE3
- Supplemental SSE3
- EM64T technology ?
- Virtualization Technology
- Execute Disable Bit technology ?
- SSE4.1 ?
- Trusted Execution technology
|
| Low power features | - Enhanced SpeedStep technology ?
- Stop Grant state ?
- Halt state
- Extended Halt state
- Extended Stop Grant State
- Sleep state ?
- Deep Sleep state ?
- Deeper Sleep state ?
|
| |
| Electrical/Thermal parameters |
| V core (V) ? | 0.85 - 1.3625 |
| Minimum/Maximum operating temperature (°C) ? | 5 - 71.4 |
| Minimum/Maximum power dissipation (W) ? | 12 (TDP in extended HALT state) / 132.48 |
| Thermal Design Power (W) ? | 95 |
| |
| Notes on Intel EU80569PJ067N |
- Binary compatible with 32-bit x86 software
- Bus frequency is 333 MHz. Because the processor uses Quad Data Rate bus the effective bus speed is 1333 MHz
|
