| General information |
| Type | CPU / Microprocessor |
| Family | Intel Core 2 Solo |
| Model number ? | U2200 |
| CPU part number | LE80537UE0091M (QZIX, SLAGL) |
| Frequency (MHz) ? | 1200 |
| Bus speed (MHz) ? | 533 |
| Clock multiplier ? | 9 |
| Package | 479-ball micro-FCBGA
1.38" x 1.38" (3.5 cm x 3.5 cm) |
| Introduction date | Sep 5, 2007 |
| Price at introduction | $262 |
| |
| Architecture / Microarchitecture |
| Processor core | Merom |
| Core stepping | A1 (QZIX, SLAGL) |
| Manufacturing process | 0.065 micron |
| Data width | 64 bit |
| Number of cores | 1 |
| Floating Point Unit | Integrated |
| Level 1 cache size ? | 32 KB instruction cache
32 KB write-back data cache |
| Level 2 cache size ? | 1 MB |
| Features | - MMX instruction set
- SSE
- SSE2
- SSE3
- Supplemental SSE3
- EM64T technology ?
- Execute Disable Bit technology ?
- Virtualization Technology
|
| Low power features | - Stop Grant mode ?
- Sleep mode ?
- Deep Sleep mode ?
- Deeper Sleep mode ?
- Enhanced Deeper Sleep mode ?
- Dynamic Cache sizing ?
- Enhanced SpeedStep technology ?
|
| |
| Electrical/Thermal parameters |
| V core (V) ? | 0.8 - 0.975 |
| Minimum/Maximum operating temperature (°C) ? | 0 - 100 |
| Maximum power dissipation (W) ? | 7.8 |
| Thermal Design Power (W) ? | 5.5 |
| |
| Notes on Intel LE80537UE0091M |
- Bus frequency is 133 MHz. Because the processor uses Quad Data Rate bus the effective bus speed is 533 MHz
|
