CPU ID
NOTE: CPU ID information below was taken from one CPU and
may include features that are not present in all different steppings of the
Intel Core Solo T1350 CPU.
| Manufacturer: | Intel |
| Family: | Core Solo |
| Model / Processor Number: | T1350 |
|
| Part number: | LF80538GE0362M |
| S-Spec / Comment: | SL99T |
| Submitted by: | CPU-World |
|
| General information |
| Vendor: | GenuineIntel |
| Processor name (BIOS): | Genuine Intel(R) CPU T1350 @ 1.86GHz |
| Cores: | 1 |
| Logical processors: | 1 |
| Processor type: | Original OEM Processor |
| CPUID signature: | 6E8 |
| Family: | 6 (06h) |
| Model: | 14 (0Eh) |
| Stepping: | 8 (08h) |
| TLB/Cache details: | 64-byte Prefetching
Data TLB: 4-KB Pages, 4-way set associative, 128 entries
Data TLB: 4-MB Pages, 4-way set associative, 8 entries
Instruction TLB: 4-KB Pages, 4-way set associative, 128 entries
Instruction TLB: 4-MB Pages, fully associative, 2 entries |
| Cache: |
L1 (data) |
L1 (instruction) |
L2 |
| Size: |
32 KB |
32 KB |
2 MB |
| Associativity: |
8-way set associative |
8-way set associative |
8-way set associative |
| Line size: |
64 bytes |
64 bytes |
64 bytes |
| |
| Instruction set extensions | Additonal instructions |
| MMX |
CLFLUSH |
| SSE |
CMOV |
| SSE2 |
CMPXCHG8B |
| SSE3 |
FXSAVE/FXRSTORE |
| |
MONITOR/MWAIT |
| |
SYSENTER/SYSEXIT |
| |
| Major features | Other features |
| On-chip Floating Point Unit |
Advanced programmable interrupt controller |
| NX bit/XD-bit |
Debug store |
| Enhanced SpeedStep |
Debugging extensions |
| |
Machine check architecture |
| |
Machine check exception |
| |
Memory-type range registers |
| |
Model-specific registers |
| |
Page attribute table |
| |
Page global extension |
| |
Page-size extensions (4MB pages) |
| |
Pending break enable |
| |
Perfmon and Debug capability |
| |
Physical address extensions |
| |
Self-snoop |
| |
Thermal monitor |
| |
Thermal monitor and software controlled clock facilities |
| |
Time stamp counter |
| |
Virtual 8086-mode enhancements |
| |
xTPR Update Control |