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Intel Core i7-950 (AT80601002112AA / BX80601950 / BXC80601950)
Specifications
| General information |
| Type | CPU / Microprocessor |
| Market segment | Desktop |
| Family | Intel Core i7 |
| Model number ? | i7-950 |
| CPU part numbers | AT80601002112AA is an OEM/tray microprocessor BX80601950 is a boxed processor (English version) BXC80601950 is a boxed processor (Chinese version) |
| Frequency ? | 3067 MHz |
| Turbo frequency | 3333 MHz (1 core)
3200 MHz (2 cores or more) |
| Bus speed ? | 2400 MHz QPI |
| Package | 1366-land Flip-Chip Land Grid Array (FC-LGA8) |
| Socket | Socket 1366 (LGA1366) |
| Introduction date | Jun 2, 2009 |
| End-of-Life date | Last order date is June 29, 2012
Last shipment date for OEM processors is December 7, 2012 |
| Price at introduction | $562 |
| | | S-spec numbers |
| |
ES/QS processors |
Production processors |
| Part number |
Q1HB |
SLBEN |
| AT80601002112AA | + | + |
| BX80601950 | | + |
| BXC80601950 | | + |
|
| | | Architecture / Microarchitecture |
| Microarchitecture | Nehalem (Nehalem) |
| Platform | X58 |
| Processor core ? | Bloomfield |
| Core stepping ? | D0 (Q1HB, SLBEN) |
| CPUID | 106A5 (Q1HB, SLBEN) |
| Manufacturing process | 0.045 micron Hi-k metal gate technology
731 million transistors |
| Die size | 263mm2 |
| Data width | 64 bit |
| The number of cores | 4 |
| The number of threads | 8 |
| Floating Point Unit | Integrated |
| Level 1 cache size ? | 4 x 32 KB instruction caches
4 x 32 KB data caches |
| Level 2 cache size ? | 4 x 256 KB |
| Level 3 cache size | Inclusive shared 8 MB cache |
| Multiprocessing | Uniprocessor |
| Features | - MMX instruction set
- SSE
- SSE2
- SSE3
- Supplemental SSE3
- SSE4.1 ?
- SSE4.2 ?
- EM64T technology ?
- Hyper-Threading technology ?
- Turbo Boost technology ?
- Virtualization technology ?
- Execute Disable bit ?
|
| Low power features | - Thread C1, C3 and C6 states
- Core C1, C3 and C6 states
- Package C3 and C6 states
- Enhanced SpeedStep technology ?
|
| On-chip peripherals | - Integrated triple-channel DDR3 SDRAM Memory controller
- Quick Path Interconnect
|
| | | Electrical/Thermal parameters |
| V core ? | 0.8V - 1.375V |
| Minimum/Maximum operating temperature ? | 5°C - 67.9°C |
| Minimum/Maximum power dissipation ? | 12 Watt (TDP in C6 state) / 230.14 Watt |
| Thermal Design Power ? | 130 Watt |
CPUs, related to Intel Core i7-950
• Highlighted numbers and features indicate whether specific processor performs better or worse than Core i7-950
• Within each category, the CPUs are sorted from slower (at the top) to faster (at the bottom)
• Features abbreviations:
AES - AES instructions TXT - Trusted Execution Unlock - Unlocked multiplier
Pictures (1)
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| Intel Core i7-950 |
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News
Dec 08, 2011: In the wake of the launch of desktop Ivy Bridge microprocessors,
coming in the second quarter 2012, Intel prepares to discontinue large
number of desktop models due to low demand. In the past two days, the
company published several Product Change Notification (PCN) documents,
that notify customers of upcoming discontinuation of 19 socket 1366,
socket 1156, and socket 1155 chips. Full list of retired SKUs
includes.
CPU ID (6)
NOTE: CPU ID information below was taken from one CPU and
may include features that are not present in all different steppings of the
Intel Core i7 i7-950 CPU.
| Manufacturer: | Intel |
| CPU Family: | Core i7 |
| Processor Number: | i7-950 |
| Frequency: | 3079 MHz |
|
| Part number: | AT80601002112AA |
| S-Spec Number: | |
| Comment: | |
| Submitted by: | |
|
| General information |
| Vendor: | GenuineIntel |
| Processor name (BIOS): | Intel(R) Core(TM) i7 CPU 950 @ 3.07GHz |
| Cores: | 4 |
| Logical processors: | 8 |
| Processor type: | Original OEM Processor |
| CPUID signature: | 106A5 |
| Family: | 6 (06h) |
| Model: | 26 (01Ah) |
| Stepping: | 5 (05h) |
| TLB/Cache details: | 64-byte Prefetching
Data TLB0: 2-MB or 4-MB pages, 4-way associative, 32 entries
Data TLB: 4-KB Pages, 4-way set associative, 64 entries
Instruction TLB: 2-MB or 4-MB pages, fully associative, 7 entries
Instruction TLB: 4-KB pages, 4-way set associative, 64 entries
Shared 2nd-level TLB: 4 KB pages, 4-way set associative, 512 entries |
| Cache: |
L1 data |
L1 instruction |
L2 |
L3 |
| Size: |
4 x 32 KB |
4 x 32 KB |
4 x 256 KB |
8 MB |
| Associativity: |
8-way set associative |
4-way set associative |
8-way set associative |
16-way set associative |
| Line size: |
64 bytes |
64 bytes |
64 bytes |
64 bytes |
| Comments: |
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Shared between all cores |
| |
| Instruction set extensions | Additional instructions |
| MMX |
CLFLUSH |
| SSE |
CMOV |
| SSE2 |
CMPXCHG16B |
| SSE3 |
CMPXCHG8B |
| SSSE3 |
FXSAVE/FXRSTORE |
| SSE4.1 |
MONITOR/MWAIT |
| SSE4.2 |
POPCNT |
| |
SYSENTER/SYSEXIT |
| |
| Major features | Other features |
| On-chip Floating Point Unit |
36-bit page-size extensions |
| 64-bit / Intel 64 |
64-bit debug store |
| Hyper-Threading Technology |
Advanced programmable interrupt controller |
| Intel Virtualization |
CPL qualified debug store |
| Turbo Boost |
Debug store |
| Enhanced SpeedStep |
Debugging extensions |
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Digital Thermal Sensor capability |
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LAHF/SAHF support in 64-bit mode |
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Machine check architecture |
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Machine check exception |
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Memory-type range registers |
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Model-specific registers |
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Page attribute table |
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Page global extension |
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Page-size extensions (4MB pages) |
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Pending break enable |
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Perfmon and Debug capability |
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Physical address extensions |
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RDTSCP |
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Self-snoop |
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TSC rate is ensured to be invariant across all states |
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Thermal monitor |
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Thermal monitor 2 |
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Thermal monitor and software controlled clock facilities |
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Time stamp counter |
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Virtual 8086-mode enhancements |
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xTPR Update Control |
Our CPUID database has 6 records for this microprocessor. See all submitted records.
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