CPU Information
First reports of imminent release of energy efficient Athlon II X3 400e and 405e processors surfaced in early 2009. There were rumors they would be released in June 2009 together with other Athlon II microprocessors. In June 2009, AMD introduced a mixture of Phenom II X2, X3 and X4 CPUs, and only one microprocessor from Athlon II family - dual-core ADX250OCK23GQ (model 250). In the course of the next three months AMD introduced standard power dual- and quad-core Athlon II CPUs. At long last, energy-efficient Athlons were announced in October 2009. Although these processors appeared in OEM systems, they were very difficult to find in US retail and online stores. Even now, three months after official release, very few stores in US have these processors in stock.
| General information |
| Family | AMD Athlon II X3 |
| Model number ? | 400e |
| ??? part number | AD400EHDK32GI |
| Box part number | AD400EHDGIBOX |
| Stepping code | CADAC AD |
| Frequency (MHz) ? | 2200 |
| Bus speed (MHz) ? | - 667 MHz Memory controller
- One 2000 MHz 16-bit HyperTransport link
|
| Package | 938-pin organic micro-PGA |
| Sockets | Socket AM2+
Socket AM3 |
| Weight | 1.4oz / 38.3g (CPU)
11.5oz / 326.4g (box) |
| Fan/heatsink | CMDK8-7G52A-A1-GP |
| Introduction date | Oct 20, 2009 |
| Price at introduction | $97 |
| |
| Architecture / Microarchitecture |
| Processor core | Rana |
| Core stepping | C2 |
| Manufacturing process | 0.045 micron |
| Die size | 169 mm2 |
| Data width | 64 bit |
| Number of cores | 3 |
| Floating Point Unit | Integrated |
| Level 1 cache size ? | 3 x 64 KB instruction caches
3 x 64 KB data caches |
| Level 2 cache size ? | 3 x 512 KB caches |
| Features | - MMX
- 3DNow!
- SSE
- SSE2
- SSE3
- SSE4a ?
- Advanced Bit Manipulation ?
- AMD64 technology ?
- AMD-V (virtualization) technology
- Enhanced Virus Protection ?
|
| Low power features | - Cool'n'Quiet 3.0
- CoolCore Technology ?
- Dual Dynamic Power Management ?
- Core C1 and C1E states
- Package S0, S1, S3, S4 and S5 states
|
| On-chip peripherals | - Integrated 144-bit DDR2/DDR3 Memory Controller
- HyperTransport 3 technology
|
| |
| Electrical/Thermal parameters |
| Maximum operating temperature (°C) ? | 71 |
| Thermal Design Power (W) ? | 45 |
| |
| Notes on AMD AD400EHDK32GI |
- The fastest supported memory is DDR2-1066 and DDR3-1333
|
CPU ID
NOTE: CPU ID information below was taken from one CPU and
may include features that are not present in all different steppings of the
AMD Athlon II X3 400e CPU.
| Manufacturer: | AMD |
| Family: | Athlon II X3 |
| Model Number: | 400e |
|
| Part number: | AD400EHDK32GI |
| S-Spec / Comment: | CADAC AD 0942DPAW |
| Submitted by: | CPU-World |
|
| General information |
|---|
| Vendor: | AuthenticAMD |
| Processor name (BIOS): | AMD Athlon(tm) II X3 400e Processor |
| Cores: | 3 |
| Logical processors: | 3 |
| Processor type: | Original OEM Processor |
| Core stepping: | BL-C2 |
| CPUID signature: | 100F52 |
| Family: | 16 (010h) |
| Model: | 5 (05h) |
| Stepping: | 2 (02h) |
| Cache: |
L1 data |
L1 instruction |
L2 |
|---|
| Size: |
3 x 64 KB |
3 x 64 KB |
3 x 512 KB |
| Associativity: |
2-way set
associative |
2-way set
associative |
16-way set
associative |
| Line size: |
64 bytes |
64 bytes |
64 bytes |
| Lines per tag: |
1 |
1 |
1 |
| |
| Instruction set extensions | Additonal instructions |
|---|
| MMX |
Advanced Bit manipulation |
| AMD extensions to MMX |
CLFLUSH |
| 3DNow! |
CMOV |
| Extensions to 3DNow! |
CMPXCHG16B |
| SSE |
CMPXCHG8B |
| SSE2 |
FXSAVE/FXRSTORE |
| SSE3 |
MONITOR/MWAIT |
| SSE4A |
POPCNT |
| |
PREFETCH/PREFETCHW |
| |
SYSCALL/SYSRET |
| |
SYSENTER/SYSEXIT |
| |
| Major features | Other features |
|---|
| On-chip Floating Point Unit |
1 GB large page support |
| 64-bit / Intel 64 |
100MHz multiplier control |
| NX bit/XD-bit |
36-bit page-size extensions |
| PowerNow! / Cool'n'Quiet |
Advanced programmable interrupt controller |
| Secure Virtual Machine (Virtualization) |
Core multi-processing legacy mode |
| |
Debugging extensions |
| |
Extended APIC space |
| |
Hardware P-state control |
| |
Hardware thermal control |
| |
Instruction based sampling |
| |
LAHF/SAHF support in 64-bit mode |
| |
LOCK MOV CR0 means MOV CR8 |
| |
Machine check architecture |
| |
Machine check exception |
| |
Memory-type range registers |
| |
Misaligned SSE mode |
| |
Model-specific registers |
| |
OS visible workaround |
| |
Page attribute table |
| |
Page global extension |
| |
Page-size extensions (4MB pages) |
| |
Physical address extensions |
| |
RDTSCP |
| |
SKINIT and STGI support |
| |
Software thermal control |
| |
THERMTRIP |
| |
TSC rate is ensured to be invariant across all states |
| |
Temperature sensor |
| |
Time stamp counter |
| |
Virtual 8086-mode enhancements |
| |
Watchdog timer support |
