Specifications
| General information |
| Type | CPU / Microprocessor |
| Market segment | Desktop |
| Family | AMD Athlon II X3 |
| Model number ? | 455 |
| CPU part numbers | ADX455WFK32GM is an OEM/tray microprocessor ADX455WFGMBOX is a boxed microprocessor |
| Stepping codes | AADIC AD CADIC AD |
| Frequency ? | 3300 MHz |
| Bus speed ? | 667 MHz Memory controller
One 2000 MHz 16-bit HyperTransport link |
| Clock multiplier ? | 16.5 |
| Package | 938-pin organic micro-PGA |
| Sockets | Socket AM2+ Socket AM3 |
| Weight | 1.4oz / 39.3g (CPU) 12.4oz / 350.6g (box) |
| Fan/heatsink | 1A02C3W00 |
| Introduction date | Dec 7, 2010 |
| Price at introduction | $87 |
| |
| Architecture / Microarchitecture |
| Microarchitecture | K10 |
| Processor core ? | Rana |
| Core stepping ? | C3 |
| Manufacturing process | 0.045 micron SOI |
| Die size | 169mm2 |
| Data width | 64 bit |
| The number of cores | 3 |
| The number of threads | 3 |
| Floating Point Unit | Integrated |
| Level 1 cache size ? | 3 x 64 KB instruction caches
3 x 64 KB data caches |
| Level 2 cache size ? | 3 x 512 KB caches |
| Multiprocessing | Uniprocessor |
| Features | - MMX
- 3DNow!
- SSE
- SSE2
- SSE3
- SSE4a ?
- Advanced Bit Manipulation ?
- AMD64 technology ?
- AMD-V (virtualization) technology
- Enhanced Virus Protection ?
|
| Low power features | - Cool'n'Quiet 3.0
- CoolCore Technology ?
- Dual Dynamic Power Management ?
- Core C1 and C1E states
- Package S0, S1, S3, S4 and S5 states
|
| On-chip peripherals | - Integrated 144-bit DDR2/DDR3 Memory Controller
- HyperTransport 3 technology
|
| |
| Electrical/Thermal parameters |
| V core ? | 0.85V - 1.4V |
| Maximum operating temperature ? | 75°C |
| Thermal Design Power ? | 95 Watt |
CPUs, related to AMD Athlon II X3 455
• Highlighted numbers and features indicate whether specific processor performs better or worse than Athlon II X3 455
• Within each category, the CPUs are sorted from slower (at the top) to faster (at the bottom)
• List of related CPUs is not complete.
• Features abbreviations:
Unlock - Unlocked multiplier
News
Dec 07, 2010: In the past month, we published a few stories about upcoming desktop
AMD microprocessors. The stories revealed pre-order availability of
Phenom II X6 1100T and dual-core Phenom II 565 CPUs, in-stock
availability of triple-core Athlon II 455 at Amazon.com, and a
reference to quad-core Phenom II 975 model on the latest public AMD
roadmap. Three of these processors, Phenom II X6 1100T BE, Phenom II
X2 565 and Athlon II X3 455, were officially released by AMD today,
and their specifications are already available on AMD website.
Dec 05, 2010: In the middle of November, a few US and European stores added the
fastest upcoming six-core AMD microprocessor, Phenom II X6 110T BE, to
their price-lists. While at first the processor was available only for
pre-order or special order, about three weeks later these processors
started to appear in stock in Europe.
Aug 20, 2010: Biostar updated CPU support information on their website, adding
hexa-core Phenom II 1045T, which, according to Fudzilla,
will be launched in this quarter. Biostar also listed three future
Athlon II microprocessors - dual-core 270, triple-core 455, and
quad-core 650.
CPU ID (1)
NOTE: CPU ID information below was taken from one CPU and
may include features that are not present in all different steppings of the
AMD Athlon II X3 455 CPU.
| Manufacturer: | AMD |
| CPU Family: | Athlon II X3 |
| Model Number: | 455 |
| Frequency: | 3300 MHz |
|
| Part number: | ADX455WFK32GM |
| Stepping Code: | |
| Comment: | |
| Submitted by: | John V |
|
| General information |
| Vendor: | AuthenticAMD |
| Processor name (BIOS): | AMD Athlon(tm) X3 455 Processor |
| Processor name (CWID): | AMD Athlon(tm) II X3 455 Processor |
| Cores: | 3 |
| Logical processors: | 3 |
| Processor type: | Original OEM Processor |
| Core stepping: | BL-C3 |
| CPUID signature: | 100F53 |
| Family: | 16 (010h) |
| Model: | 5 (05h) |
| Stepping: | 3 (03h) |
| Cache: |
L1 data |
L1 instruction |
L2 |
| Size: |
3 x 64 KB |
3 x 64 KB |
3 x 512 KB |
| Associativity: |
2-way set associative |
2-way set associative |
16-way set associative |
| Line size: |
64 bytes |
64 bytes |
64 bytes |
| Lines per tag: |
1 |
1 |
1 |
| |
| Instruction set extensions | Additional instructions |
| MMX |
Advanced Bit manipulation |
| AMD extensions to MMX |
CLFLUSH |
| 3DNow! |
CMOV |
| Extensions to 3DNow! |
CMPXCHG16B |
| SSE |
CMPXCHG8B |
| SSE2 |
FXSAVE/FXRSTORE |
| SSE3 |
MONITOR/MWAIT |
| SSE4A |
POPCNT |
| |
PREFETCH/PREFETCHW |
| |
SYSCALL/SYSRET |
| |
SYSENTER/SYSEXIT |
| |
| Major features | Other features |
| On-chip Floating Point Unit |
1 GB large page support |
| 64-bit / Intel 64 |
100MHz multiplier control |
| NX bit/XD-bit |
128-bit SSE instructions |
| Secure Virtual Machine (Virtualization) |
36-bit page-size extensions |
| PowerNow! / Cool'n'Quiet |
Advanced programmable interrupt controller |
| |
Core multi-processing legacy mode |
| |
Debugging extensions |
| |
Extended APIC space |
| |
Hardware P-state control |
| |
Hardware thermal control |
| |
Instruction based sampling |
| |
LAHF/SAHF support in 64-bit mode |
| |
LBR virtualization |
| |
LOCK MOV CR0 means MOV CR8 |
| |
Machine check architecture |
| |
Machine check exception |
| |
Memory-type range registers |
| |
Misaligned SSE mode |
| |
Model-specific registers |
| |
Nested page tables |
| |
OS visible workaround |
| |
Page attribute table |
| |
Page global extension |
| |
Page-size extensions (4MB pages) |
| |
Physical address extensions |
| |
RDTSCP |
| |
SKINIT and STGI support |
| |
SVM lock |
| |
Software thermal control |
| |
Support for NRIP save |
| |
THERMTRIP |
| |
TSC rate is ensured to be invariant across all states |
| |
Temperature sensor |
| |
Time stamp counter |
| |
Virtual 8086-mode enhancements |
| |
Watchdog timer support |