Specifications
| General information |
| Type | CPU / Microprocessor |
| Market segment | Desktop |
| Family | AMD Phenom II X2 |
| Model number ? | 555 |
| CPU part numbers | HDZ555WFK2DGM is an OEM/tray microprocessor HDZ555WFGMBOX is a boxed microprocessor |
| Stepping codes | AACAC AC CACAC AC CACDC AC |
| Frequency ? | 3200 MHz |
| Bus speed ? | 667 MHz Memory controller
One 2000 MHz 16-bit HyperTransport link |
| Clock multiplier ? | 16 |
| Package | 938-pin organic micro-PGA |
| Sockets | Socket AM2+ Socket AM3 |
| Fan/heatsink | CMDK8-7G52B-A1-GP |
| Introduction date | January 25, 2010 |
| Price at introduction | $99 |
| |
| Architecture / Microarchitecture |
| Microarchitecture | K10 |
| Platform | Dragon |
| Processor core ? | Callisto |
| Core stepping ? | RB-C3 |
| CPUID | 100F43 |
| Manufacturing process | 0.045 micron SOI |
| Die size | 258mm2 |
| Data width | 64 bit |
| The number of cores | 2 |
| The number of threads | 2 |
| Floating Point Unit | Integrated |
| Level 1 cache size ? | 2 x 64 KB instruction caches
2 x 64 KB data caches |
| Level 2 cache size ? | 2 x 512 KB caches |
| Level 3 cache size | 6 MB shared cache |
| Multiprocessing | Uniprocessor |
| Features | - MMX
- 3DNow!
- SSE
- SSE2
- SSE3
- SSE4a ?
- Advanced Bit Manipulation ?
- AMD64 technology ?
- AMD-V (virtualization) technology
- Enhanced Virus Protection ?
|
| Low power features | - Cool'n'Quiet 3.0
- CoolCore Technology ?
- Dual Dynamic Power Management ?
- Core C1 and C1E states
- Package S0, S1, S3, S4 and S5 states
|
| On-chip peripherals | - Integrated dual-channel 144-bit DDR2/DDR3 Memory Controller
- HyperTransport 3 technology
|
| |
| Electrical/Thermal parameters |
| V core ? | 0.875V - 1.4V |
| Maximum operating temperature ? | 55°C - 70°C |
| Thermal Design Power ? | 80 Watt |
| |
| Notes on AMD HDZ555WFK2DGM |
- The fastest supported memory is DDR2-1066 and DDR3-1333
- The processor has unlocked clock multiplier
|
CPUs, related to AMD Phenom II X2 555 BE (rev. C3)
• Highlighted numbers and features indicate whether specific processor performs better or worse than Phenom II X2 555 BE (rev. C3)
• Within each category, the CPUs are sorted from slower (at the top) to faster (at the bottom)
• List of related CPUs is not complete.
• Features abbreviations:
Unlock - Unlocked multiplier
News
Dec 07, 2010: With the launch of three new desktop processors today, AMD
also dropped prices on many older models. Majority of price cuts were
insignificant, typically in the range from 3% to 10%. The price of one
microprocessor, Phenom II X4 970, was increased by $5, or by about 3%.
May 24, 2010: Core i3-550 microprocessor was planned for the second quarter of this year. Although this model is not officially released yet, it is already available in many stores. We tested one of the processors, and compared results to other Intel Core i3 and Core i5 CPUs, as well as a few selected Athlon II and Phenom II dual-, triple- and quad-core microprocessors.
May 03, 2010: A few weeks ago we acquired a lot of Athlon II processors with C3 core revision. Although we posted pictures and individual benchmarks to Athlon II CPU pages, and added the results to our benchmark database more than a week ago, we decided to provide benchmarks in more readable format, i.e. as a review.
CPU ID (4)
NOTE: CPU ID information below was taken from one CPU and
may include features that are not present in all different steppings of the
AMD Phenom II X2 555 CPU.
| Manufacturer: | AMD |
| CPU Family: | Phenom II X2 |
| Model Number: | 555 |
| Frequency: | 3214 MHz |
|
| Part number: | HDZ555WFK2DGM |
| Stepping Code: | |
| Comment: | |
| Submitted by: | |
|
| General information |
| Vendor: | AuthenticAMD |
| Processor name (BIOS): | AMD Phenom(tm) II X2 555 Processor |
| Cores: | 2 |
| Logical processors: | 2 |
| Processor type: | Original OEM Processor |
| Core stepping: | RB-C3 |
| CPUID signature: | 100F43 |
| Family: | 16 (010h) |
| Model: | 4 (04h) |
| Stepping: | 3 (03h) |
| Cache: |
L1 data |
L1 instruction |
L2 |
L3 |
| Size: |
2 x 64 KB |
2 x 64 KB |
2 x 512 KB |
6 MB |
| Associativity: |
2-way set associative |
2-way set associative |
16-way set associative |
48-way set associative |
| Line size: |
64 bytes |
64 bytes |
64 bytes |
64 bytes |
| Lines per tag: |
1 |
1 |
1 |
1 |
| |
| Instruction set extensions | Additional instructions |
| MMX |
Advanced Bit manipulation |
| AMD extensions to MMX |
CLFLUSH |
| 3DNow! |
CMOV |
| Extensions to 3DNow! |
CMPXCHG16B |
| SSE |
CMPXCHG8B |
| SSE2 |
FXSAVE/FXRSTORE |
| SSE3 |
MONITOR/MWAIT |
| SSE4A |
POPCNT |
| |
PREFETCH/PREFETCHW |
| |
SYSCALL/SYSRET |
| |
SYSENTER/SYSEXIT |
| |
| Major features | Other features |
| On-chip Floating Point Unit |
1 GB large page support |
| 64-bit / Intel 64 |
100MHz multiplier control |
| NX bit/XD-bit |
128-bit SSE instructions |
| Secure Virtual Machine (Virtualization) |
36-bit page-size extensions |
| PowerNow! / Cool'n'Quiet |
Advanced programmable interrupt controller |
| |
Core multi-processing legacy mode |
| |
Debugging extensions |
| |
Extended APIC space |
| |
Hardware P-state control |
| |
Hardware thermal control |
| |
Instruction based sampling |
| |
LAHF/SAHF support in 64-bit mode |
| |
LBR virtualization |
| |
LOCK MOV CR0 means MOV CR8 |
| |
Machine check architecture |
| |
Machine check exception |
| |
Memory-type range registers |
| |
Misaligned SSE mode |
| |
Model-specific registers |
| |
Nested page tables |
| |
OS visible workaround |
| |
Page attribute table |
| |
Page global extension |
| |
Page-size extensions (4MB pages) |
| |
Physical address extensions |
| |
RDTSCP |
| |
SKINIT and STGI support |
| |
SVM lock |
| |
Software thermal control |
| |
Support for NRIP save |
| |
THERMTRIP |
| |
TSC rate is ensured to be invariant across all states |
| |
Temperature sensor |
| |
Time stamp counter |
| |
Virtual 8086-mode enhancements |
| |
Watchdog timer support |
Our CPUID database has 4 records for this microprocessor. See all submitted records.