Core revisions BA and B2, which correspond to part numbers ending with "BGC" and "BGD" respectively, had a Translation Look-aside Buffer (TLB) bug where, under certain conditions, the processor could lock up when loading cached TLB data. This bug was referenced in AMD documentation as errata 254: "Internal Resource Livelock Involving Cached TLB Reload". Temporary bug fix was to disable TLB caching, which had negative impact on processor performance. The temporary fix (or patch) was implemented in BIOS, and was also included into operating systems. On some motherboards it was possible to disable the patch in BIOS and thus increase performance by 10% on average. In cases, when disabling the patch was not supported by a motherboard, or when the patch was enabled by operating system regardless of the BIOS settings, it was still possible to disable the patch by manipulating MSR registers directly with the help of software tools.
AMD Phenom X4 9500 specifications
|Type||CPU / Microprocessor|
|Family||AMD Phenom X4|
|Model number ? ||9500|
|CPU part numbers||HD9500WCJ4BGD is an OEM/tray microprocessor|
HD9500WCGDBOX is a boxed microprocessor
|Stepping codes||AAAZB AA CAAAB AA CAAWB AA CAAZB AA JAAWB AA|
|Frequency ? ||2200 MHz|
|Bus speed ? ||533 MHz Memory controller|
One 1800 MHz 16-bit HyperTransport link
|Clock multiplier ? ||11|
|Package||940-pin organic micro-PGA|
|Introduction date||Nov 19, 2007|
|Price at introduction||$251|
|Architecture / Microarchitecture|
|Processor core ? ||Agena|
|Core stepping ? ||B2|
|Manufacturing process||0.065 micron SOI|
450 million transistors
|Data width||64 bit|
|The number of cores||4|
|The number of threads||4|
|Floating Point Unit||Integrated|
|Level 1 cache size ? ||4 x 64 KB 2-way associative instruction caches|
4 x 64 KB 2-way associative data caches
|Level 2 cache size ? ||4 x 512 KB 16-way set associative caches|
|Level 3 cache size||2 MB 32-way set associative shared cache|
- MMX instructions
- 3DNow! technology
- SSE / Streaming SIMD Extensions
- SSE2 / Streaming SIMD Extensions 2
- SSE3 / Streaming SIMD Extensions 3
- SSE4a ?
- ABM / Advanced Bit Manipulation ?
- AMD64 / AMD 64-bit technology ?
- AMD-V / AMD Virtualization technology
- EVP / Enhanced Virus Protection ?
|Low power features|
- Cool'n'Quiet 2.0
- CoolCore technology ?
- Independent Dynamic Core Technology ?
- Dual Dynamic Power Management ?
- Core C1 and C1E states
- Package S1, S3, S4 and S5 states
|Integrated peripherals / components|
- The number of controllers: 1
Memory channels: 2
Channel width (bits): 72
Supported memory: DDR2-1066
DIMMs per channel: up to 2
Maximum memory bandwidth (GB/s): 17.1
|Other peripherals||HyperTransport 3 technology|
|Electrical / Thermal parameters|
|V core ? ||1.15V - 1.25V|
|Maximum operating temperature ? ||55°C - 70°C|
|Thermal Design Power ? ||95 Watt|
|Notes on AMD HD9500WCJ4BGD|
- On socket AM2+ platforms in the minimum performance state the processor runs at 1100 MHz / 1.05 Volt core voltage, and has TDP 66.1 Watt
- On socket AM2 platforms in the minimum performance state the processor runs at 1100 MHz / 1.15 - 1.25 Volt core voltage, and has TDP 67.2 Watt
Detailed side-by-side comparison
Q: I have an AMD Phenom X4 9500 processor. Is it possible to upgrade it?
A: Probably yes. CPU compatibility is determined by your motherboard. Please check CPU-Upgrade.com website for CPU support list for your board.
Phenom X4 9500 Overclocking
Sorry, overclocking information is not available at this time.