| General information |
| Type | CPU / Microprocessor |
| Family | AMD Phenom X4 |
| Model number ? | 9750 |
| CPU part number | HD9750WCJ4BGH |
| Box part number | HD9750WCGHBOX |
| Stepping codes | JAAFB AA JAAHB AA |
| Frequency (MHz) ? | 2400 |
| Bus speed (MHz) ? | - 533 MHz Memory controller
- One 1800 MHz 16-bit HyperTransport link
|
| Package | 940-pin organic micro-PGA |
| Sockets | Socket AM2
Socket AM2+ |
| Introduction date | Mar 27, 2008 |
| Price at introduction | $215 |
| |
| Architecture / Microarchitecture |
| Processor core | Agena |
| Core stepping | B3 |
| Manufacturing process | 0.065 micron SOI
450 million transistors |
| Die size | 285 mm2 |
| Data width | 64 bit |
| Number of cores | 4 |
| Floating Point Unit | Integrated |
| Level 1 cache size ? | 4 x 64 KB 2-way associative instruction caches
4 x 64 KB 2-way associative data caches |
| Level 2 cache size ? | 4 x 512 KB 16-way set associative caches |
| Level 3 cache size | 2 MB 32-way set associative shared cache |
| Features | - MMX
- 3DNow!
- SSE
- SSE2
- SSE3
- SSE4a ?
- Advanced Bit Manipulation ?
- AMD64 technology ?
- AMD-V (virtualization) technology
- Enhanced Virus Protection ?
|
| Low power features | - Cool'n'Quiet 2.0
- CoolCore technology ?
- Independent Dynamic Core Technology ?
- Dual Dynamic Power Management ?
- Core C1 and C1E states
- Package S1, S3, S4 and S5 states
|
| On-chip peripherals | - Integrated dual-channel 144-bit DDR2 SDRAM Memory controller
- HyperTransport 3 technology
|
| |
| Electrical/Thermal parameters |
| V core (V) ? | 1.15 - 1.25 |
| V NorthBridge (V) | 1.25 |
| Maximum operating temperature (°C) ? | 55 - 70 |
| Thermal Design Power (W) ? | 95 |
| |
| Notes on AMD HD9750WCJ4BGH |
- On socket AM2+ platforms in the minimum performance state the processor runs at 1200 MHz / 1.05 Volt core voltage, and has TDP 56.9 Watt
- On socket AM2 platforms in the minimum performance state the processor runs at 1200 MHz / 1.15 - 1.25 Volt core voltage, and has TDP 65.3 Watt
|
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