Specifications
| General information |
| Type | CPU / Microprocessor |
| Market segment | Server |
| Family | AMD Six-Core Opteron |
| Model number ? | 2425 HE |
| CPU part numbers | OS2425PDS6DGN is an OEM/tray microprocessor OS2425PDS6DGNWOF is a boxed microprocessor |
| Stepping codes | CCADD CA CCAED CA |
| Frequency ? | 2100 MHz |
| Bus speed ? | 2200 MHz (integrated memory controller)
2400 MHz (HyperTransport links) |
| Package | 1207-land lidded LGA |
| Socket | Socket Fr6(1207) |
| Introduction date | Jul 13, 2009 |
| Price at introduction | $523 |
| |
| Architecture / Microarchitecture |
| Microarchitecture | K10 |
| Processor core ? | Istanbul |
| Core stepping ? | D0 |
| Manufacturing process | 0.045 micron SOI |
| Data width | 64 bit |
| The number of cores | 6 |
| The number of threads | 6 |
| Floating Point Unit | Integrated |
| Level 1 cache size ? | 6 x 64 KB 2-way associative instruction caches
6 x 64 KB 2-way associative data caches |
| Level 2 cache size ? | 6 x 512 KB 16-way associative caches |
| Level 3 cache size | 6 MB 48-way associative shared cache |
| Physical memory | 256 TB |
| Multiprocessing | Up to 2 processors |
| Features | - MMX
- 3DNow!
- SSE
- SSE2
- SSE3
- SSE4a ?
- Advanced Bit Manipulation ?
- AMD64 technology ?
- AMD-V (virtualization) technology
- Enhanced Virus Protection ?
|
| Low power features | - PowerNow! technology
- CoolCore technology ?
- Dual Dynamic Power Management ?
- Power Cap technology
- Smart Fetch technology
- C0, C1, S0, S1, S3, S4, and S5 states
|
| On-chip peripherals | - Integrated dual-channel 144-bit DDR2 SDRAM Memory controller
- HyperTransport 3.0 technology with HT Assist and three 16-bit links
|
| |
| Electrical/Thermal parameters |
| V core ? | 1.3V |
| Minimum operating temperature | 0°C |
| Maximum operating temperature ? | 55°C - 76°C |
| Average CPU Power | 55 Watt |
| Thermal Design Power ? | 79 Watt |
CPUs, related to AMD Six-Core Opteron 2425 HE
• Within each category, the CPUs are sorted from slower (at the top) to faster (at the bottom)
• List of related CPUs is not complete.
CPU ID (1)
NOTE: CPU ID information below was taken from one CPU and
may include features that are not present in all different steppings of the
AMD Six-Core Opteron 2425 HE CPU.
| Manufacturer: | AMD |
| CPU Family: | Six-Core Opteron |
| Model Number: | 2425 HE |
| Frequency: | 2100 MHz |
|
| Part number: | OS2425PDS6DGN |
| Stepping Code: | |
| Comment: | |
| Submitted by: | |
|
| General information |
| Vendor: | AuthenticAMD |
| Processor name (BIOS): | Six-Core AMD Opteron(tm) Processor 2425 HE |
| Cores: | 6 |
| Logical processors: | 6 |
| Processor type: | Original OEM Processor |
| Core stepping: | HY-D0 |
| CPUID signature: | 100F80 |
| Family: | 16 (010h) |
| Model: | 8 (08h) |
| Stepping: | 0 (00h) |
| Cache: |
L1 data |
L1 instruction |
L2 |
L3 |
| Size: |
6 x 64 KB |
6 x 64 KB |
6 x 512 KB |
6 MB |
| Associativity: |
2-way set associative |
2-way set associative |
16-way set associative |
48-way set associative |
| Line size: |
64 bytes |
64 bytes |
64 bytes |
64 bytes |
| Lines per tag: |
1 |
1 |
1 |
1 |
| |
| Instruction set extensions | Additional instructions |
| MMX |
Advanced Bit manipulation |
| AMD extensions to MMX |
CLFLUSH |
| 3DNow! |
CMOV |
| Extensions to 3DNow! |
CMPXCHG16B |
| SSE |
CMPXCHG8B |
| SSE2 |
FXSAVE/FXRSTORE |
| SSE3 |
MONITOR/MWAIT |
| SSE4A |
POPCNT |
| |
PREFETCH/PREFETCHW |
| |
SYSCALL/SYSRET |
| |
SYSENTER/SYSEXIT |
| |
| Major features | Other features |
| On-chip Floating Point Unit |
1 GB large page support |
| 64-bit / Intel 64 |
100MHz multiplier control |
| NX bit/XD-bit |
128-bit SSE instructions |
| Secure Virtual Machine (Virtualization) |
36-bit page-size extensions |
| PowerNow! / Cool'n'Quiet |
Advanced programmable interrupt controller |
| |
Core multi-processing legacy mode |
| |
Debugging extensions |
| |
Extended APIC space |
| |
Hardware P-state control |
| |
Hardware thermal control |
| |
Instruction based sampling |
| |
LAHF/SAHF support in 64-bit mode |
| |
LBR virtualization |
| |
LOCK MOV CR0 means MOV CR8 |
| |
Machine check architecture |
| |
Machine check exception |
| |
Memory-type range registers |
| |
Misaligned SSE mode |
| |
Model-specific registers |
| |
Nested page tables |
| |
OS visible workaround |
| |
Page attribute table |
| |
Page global extension |
| |
Page-size extensions (4MB pages) |
| |
Physical address extensions |
| |
RDTSCP |
| |
SKINIT and STGI support |
| |
SVM lock |
| |
Software thermal control |
| |
Support for NRIP save |
| |
THERMTRIP |
| |
TSC rate is ensured to be invariant across all states |
| |
Temperature sensor |
| |
Time stamp counter |
| |
Virtual 8086-mode enhancements |
| |
Watchdog timer support |