AMD K6 family is the second generation of x86-compatible 32-bit processors
designed by AMD. The K6 microprocessor is based on Enhanced
RISC86 core. This core uses special decoder units to translate
complex x86 instructions into short RISC-like instructions, that are
executed by seven execution units: two integer units, multimedia
unit, FPU, branch unit, and load and store units. This design allows
the RISC86 core to execute up to 4 RISC-like instructions per cycle.
Another advantage of RISC core is the ability to run at frequencies
higher then processors with CISC-based cores. In addition to the new
core, the AMD K6 has other performance enhancements over its
predecessor, an AMD K5:
- The size of level 1 instruction and data caches was increased to 32 KB each.
- The processor included support for MMX instruction set.
Overall the AMD K6 processor was faster than similar clocked K5 CPU
in integer and floating-point calculations.
Initially, the K6 processors used Pentium II Rating (PR2) to
designate their speed. The PR2 rating was dropped because the rated
frequency of the processor was the same as the real frequency.
AMD produced both desktop and mobile K6 processors. Mobile K6
processors had lower core voltage and lower power requirements than
desktop K6 microprocessors.
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