CPU Information
| General information |
| Frequency (MHz) ? | 133 |
| Bus speed (MHz) ? | 66 |
| Clock multiplier ? | 2 |
| Package | 360-pin ceramic PGA |
| | | Architecture / Microarchitecture |
| Manufacturing process | 0.25 micron 5-layer metal process
9million transistors |
| Die size | 90 (expected) mm2 |
| Floating Point Unit | Integrated |
| Level 1 cache size ? | 64 KB |
| Features | MMX instruction set |
| On-chip peripherals | - SDRAM controller
- AGP controller
- 2D graphics controller
- 3D graphics accelerator
|
| | | Electrical/Thermal parameters |
| V core (V) ? | 2.5 |
| |
| Notes |
- Most information on this page is based on Cyrix MXi announcement
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Pictures (2)
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| Top view |
133 MHz
360-pin ceramic PGA
Engineering sample |
%20(ES)%20(top).jpg) |
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| Bottom view |
133 MHz
360-pin ceramic PGA
Engineering sample |
%20(ES)%20(bottom).jpg) |
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%20(ES)%20(top).jpg)
%20(ES)%20(bottom).jpg)