VIA Mark CoreFusion highly integrated microprocessor

VIA Mark CoreFusion is a highly integrated microprocessor that incorporates VIA Eden CPU core and VIA CLE266 North Bridge. The CPU core has 64 KB instruction and data level 1 caches, 64 KB exclusive level 2 cache, full-speed Floating Point Unit, enhanced branch prediction, MMX, 3DNow! and SSE instructions. The core also includes security block with AES encryption/encryption and random number generation. The CPU runs at 133 MHz Front Side Bus frequency. The CL266 north bridge chipset includes SDRAM memory controller and S3 Graphics ProSavage4 2D/3D graphics controller.

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Architecture
Identification
Pinouts
Support chips
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At a glance
Data width (bit):
32
Introduction:
2003
Technology:
0.13 micron
Frequency (MHz):
533 - 1000
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