VIA Mark CoreFusion highly integrated microprocessor

VIA Mark CoreFusion is a highly integrated microprocessor that incorporates VIA Eden CPU core and VIA CLE266 North Bridge. The CPU core has 64 KB instruction and data level 1 caches, 64 KB exclusive level 2 cache, full-speed Floating Point Unit, enhanced branch prediction, MMX, 3DNow! and SSE instructions. The core also includes security block with AES encryption/encryption and random number generation. The CPU runs at 133 MHz Front Side Bus frequency. The CL266 north bridge chipset includes SDRAM memory controller and S3 Graphics ProSavage4 2D/3D graphics controller.
Terms and Conditions · Privacy Policy · Contact Us (c) Copyright 2003 - 2010 Gennadiy Shvets

Search CPU-World

Search site contents:

Identify part

Identify CPU, FPU or MCU:

Related Links

Architecture
Identification

At a glance

Type:
32-bit system-on-a-chip
Introduction:
2003
Technology (micron):
0.13
Frequency (GHz):
0.53 - 1
L2 cache size (KB):
64
Sockets:
BGA686