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Intel Pentium Pro 200 512 KB - KB80521EX200 512K (BP80521200 512K)

CPU » Pentium II family » Pentium Pro » KB80521EX200 512K

CPU Information

General information
TypeCPU / Microprocessor
FamilyIntel Pentium Pro
CPU part numberKB80521EX200 512K (Q010, Q011, Q0865, Q932, Q936, SL22Z, SY048)
Box part numberBP80521200 512K
Frequency (MHz)  ? 200
Bus speed (MHz)  ? 66
Clock multiplier  ? 3
Package387-pin Modified Staggered Ceramic Pin Grid Array with gold plated heat spreader
2.66" x 2.46" (6.76 cm x 6.25 cm)
SocketSocket 8
Introduction date1-Nov-95
Upgrade optionsPentium II Overdrive
 
Architecture / Microarchitecture
Core steppingssA0 (Q0865)
sA1 (Q932, Q936, SY048)
sB1 (Q010, Q011, SL22Z)
Manufacturing process0.35 and 0.6 micron
5.5 million transistors
Data width32 bit
Data bus width64 bit
Floating Point UnitIntegrated
Level 1 cache size  ? 8 KB four-way set associative code
8 KB two-way set associative data
Level 2 cache size  ? 512 KB
 
Electrical/Thermal parameters
V core (V)  ? 3.3
Minimum/Maximum operating temperature (°C)  ? 0 - 85
Minimum/Typical/Maximum power dissipation (W)0.3 / 32.6 / 37.9

Pictures (2)

Production part

200 MHz

512 KB L2 cache
387-pin modified SPGA
Gold plated heat spreader

Image reduced 2x times		 Intel Pentium Pro 200 512 KB - KB80521EX200 512K (BP80521200 512K)
Pre-production sample

200 MHz
512 KB L2 cache
387-pin modified SPGA
Gold plated heat spreader

Pre-production version
Image reduced 2x times		 Intel Pentium Pro 200 512 KB - KB80521EX200 512K (BP80521200 512K)
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CPU ID

NOTE: CPU ID information below was taken from one CPU and may include features that are not present in all different steppings of the Intel Pentium Pro 200 MHz CPU.

Manufacturer:Intel
Family:Pentium Pro
Model / Processor Number:200 MHz
Part number:KB80521EX200 512K
S-Spec / Comment:SL22Z
Submitted by:cocoe
General information
Vendor:GenuineIntel
Processor type:Original OEM Processor
CPUID signature:619
Family: 6 (06h)
Model: 1 (01h)
Stepping: 9 (09h)
TLB/Cache details:Data TLB: 4-KB Pages, 4-way set associative, 64 entries
Data TLB: 4-MB Pages, 4-way set associative, 8 entries
Instruction TLB: 4-KB Pages, 4-way set associative, 32 entries
Instruction TLB: 4-MB Pages, fully associative, 2 entries

Cache: L1 (data) L1 (instruction) L2
Size: 8 KB 8 KB 512 KB
Associativity: 2-way set associative 4-way set associative 4-way set associative
Line size: 32 bytes 32 bytes 32 bytes
 
Instruction set extensionsAdditonal instructions
  CMOV
  CMPXCHG8B
 
Major featuresOther features
On-chip Floating Point Unit Debugging extensions
  Machine check architecture
  Machine check exception
  Memory-type range registers
  Model-specific registers
  Page global extension
  Page-size extensions (4MB pages)
  Physical address extensions
  Time stamp counter
  Virtual 8086-mode enhancements

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Last modified: 18 Nov 2009
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