CPU-World logo News · Chips · Information · Forum · Links · About
Search   Identify
BSP · CPU · FPU · MCU · SoC · Other ICs · Curiosities

Intel Mobile Pentium III 850 - KC80526GY850256

CPU » Pentium III family » Mobile Pentium III » KC80526GY850256

CPU Information

General information
TypeCPU / Microprocessor
FamilyIntel Mobile Pentium III
CPU part numberKC80526GY850256 (QAB6, SL4AG, SL547)
Frequency (MHz)  ? 850
Bus speed (MHz)  ? 100
Clock multiplier  ? 8.5
Package495-ball plastic BGA2 (PBGA-B495)
1.22" x 1.07" (3.1 cm x 2.72 cm)
Introduction dateSep 25, 2000
Price at introduction$722
 
Architecture / Microarchitecture
Processor coreCoppermine
Core steppingsBC0 (SL4AG)
BD0 (QAB6, SL547)
Manufacturing process0.18 micron
28 million transistors
Data width32 bit
Floating Point UnitIntegrated
Level 1 cache size  ? 16 KB 4-way set associative instruction cache
16 KB 4-way set associative write-back data cache
Level 2 cache size  ? 256 KB 8-way set associative on-die cache
Features
  • MMX technology
  • SSE
Low power features
  • Stop Grant mode  ? 
  • Auto Halt mode  ? 
  • Sleep mode  ? 
  • Deep Sleep mode  ? 
  • Quick Start mode
  • SpeedStep technology  ? 
 
Electrical/Thermal parameters
Min/Recommended/Max V core (V)1.485 / 1.6 / 1.64
Minimum/Maximum operating temperature (°C)  ? 0 - 100
Minimum/Maximum power dissipation (W)  ? 5.74 (Stop Grant mode) / 28.86
Thermal Design Power (W)  ? 18.2
 
Notes on Intel KC80526GY850256
  • Markings on the processor are "KC 850/256"
  • The CPU runs at 700 MHz in battery-optimized mode (1.35 Volt)

Pictures (0)

Add picture

CPU ID

NOTE: CPU ID information below was taken from one CPU and may include features that are not present in all different steppings of the Intel Mobile Pentium III 850 MHz / 495 pin CPU.

Manufacturer:Intel
Family:Mobile Pentium III
Model / Processor Number:850 MHz / 495 pin
Part number:KC80526GY850256
S-Spec / Comment:SL4AG
Submitted by:cocoe
General information
Vendor:GenuineIntel
Processor type:Original OEM Processor
CPUID signature:686
Family: 6 (06h)
Model: 8 (08h)
Stepping: 6 (06h)
TLB/Cache details:Data TLB: 4-KB Pages, 4-way set associative, 64 entries
Data TLB: 4-MB Pages, 4-way set associative, 8 entries
Instruction TLB: 4-KB Pages, 4-way set associative, 32 entries
Instruction TLB: 4-MB Pages, fully associative, 2 entries

Cache: L1 (data) L1 (instruction) L2
Size: 16 KB 16 KB 256 KB
Associativity: 4-way set associative 4-way set associative 8-way set associative
Line size: 32 bytes 32 bytes 32 bytes
 
Instruction set extensionsAdditonal instructions
MMX CMOV
SSE CMPXCHG8B
  FXSAVE/FXRSTORE
  SYSENTER/SYSEXIT
 
Major featuresOther features
On-chip Floating Point Unit 36-bit page-size extensions
  Debugging extensions
  Machine check architecture
  Machine check exception
  Memory-type range registers
  Model-specific registers
  Page attribute table
  Page global extension
  Page-size extensions (4MB pages)
  Physical address extensions
  Time stamp counter
  Virtual 8086-mode enhancements

Comments (0)

Add comment
Related Links
Architecture
Identification
Pinouts
Support chips
 
Add comment
Add picture
Link to this page

Where to buy
Related CPUs
Find Mobile Pentium III CPUs with:

Last modified: 30 Oct 2009
  Terms and Conditions · Contact Us (c) Copyright 2003 - 2008 Gennadiy Shvets