Intel Pentium III 1200 - RK80530PZ009256 (BX80530C1200256)
Specifications
| General information | |
| Type | CPU / Microprocessor |
| Market segment | Desktop |
| Family | Intel Pentium III |
| CPU part number | RK80530PZ009256 (QCP8ES, QGE4ES, SL5GN, SL5PM, SL6C3, SL6JL) |
| Box part number | BX80530C1200256 (SL5GN, SL5PM) |
| Frequency (MHz) ? | 1200 |
| Bus speed (MHz) ? | 133 |
| Clock multiplier ? | 9 |
| Package | 370-pin Flip-Chip Pin Grid Array with heatspreader (FC-PGA2) 1.95" x 1.95" (4.95 cm x 4.95 cm) |
| Socket | Socket 370 |
| Architecture / Microarchitecture | |
| Processor core ? | Tualatin |
| Core steppings ? | tA1 (SL5GN, SL5PM) tB1 (SL6C3) |
| Manufacturing process | 0.13 micron |
| Data width | 32 bit |
| Floating Point Unit | Integrated |
| Level 1 cache size ? | 16 KB instruction cache 16 KB data cache |
| Level 2 cache size ? | Full-speed on-die 8-way set associative 256 KB cache |
| Multiprocessing | Uni-processor |
| Features |
|
| Low power features |
|
| Electrical/Thermal parameters | |
| V core (V) ? | 1.475 |
| Maximum operating temperature (°C) ? | 69 |
| Minimum/Maximum power dissipation (W) ? | 20.65 (Stop Grant state) / 29.9 |
Pictures (1)
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CPU ID
NOTE: CPU ID information below was taken from one CPU and may include features that are not present in all different steppings of the Intel Pentium III 1200 MHz CPU.
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| General information | |
|---|---|
| Vendor: | GenuineIntel |
| Processor name (BIOS): | Intel(R) Pentium(R) III CPU 1200MHz |
| Processor type: | Original OEM Processor |
| CPUID signature: | 6B1 |
| Family: | 6 (06h) |
| Model: | 11 (0Bh) |
| Stepping: | 1 (01h) |
| TLB/Cache details: | Data TLB: 4-KB Pages, 4-way set associative, 64 entries Data TLB: 4-MB Pages, 4-way set associative, 8 entries Instruction TLB: 4-KB Pages, 4-way set associative, 32 entries Instruction TLB: 4-MB Pages, fully associative, 2 entries |
| Cache: | L1 data | L1 instruction | L2 |
|---|---|---|---|
| Size: | 16 KB | 16 KB | 256 KB |
| Associativity: | 4-way set associative |
4-way set associative |
8-way set associative |
| Line size: | 32 bytes | 32 bytes | 32 bytes |
| Instruction set extensions | Additonal instructions | ||
|---|---|---|---|
| MMX | CMOV | ||
| SSE | CMPXCHG8B | ||
| FXSAVE/FXRSTORE | |||
| SYSENTER/SYSEXIT | |||
| Major features | Other features | ||
| On-chip Floating Point Unit | 36-bit page-size extensions | ||
| Advanced programmable interrupt controller | |||
| Debugging extensions | |||
| Machine check architecture | |||
| Machine check exception | |||
| Memory-type range registers | |||
| Model-specific registers | |||
| Page attribute table | |||
| Page global extension | |||
| Page-size extensions (4MB pages) | |||
| Physical address extensions | |||
| Time stamp counter | |||
| Virtual 8086-mode enhancements | |||
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