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Intel Pentium 4 2.4A GHz - B80546PE0561M (BX80546PE2400E)

CPU » Pentium 4 family » Pentium 4 Prescott » B80546PE0561M

CPU Information

General information
TypeCPU / Microprocessor
FamilyIntel Pentium 4
CPU part numberB80546PE0561M (SL7YP, SL88F)
Box part numberBX80546PE2400E (SL7E8, SL7FY, SL7YP, SL88F)
Frequency (MHz)  ? 2400
Bus speed (MHz)  ? 533
Clock multiplier  ? 18
Package478-pin Flip-Chip Pin Grid Array (FC-mPGA4)
1.378" x 1.378" (3.5 cm x 3.5 cm)
SocketSocket 478 (mPGA478B)
 
Architecture / Microarchitecture
Processor corePrescott
Core steppingsC0 (SL7E8, SL7FY, SL7YP)
E0 (SL88F)
Manufacturing process0.09 micron
125 million transistors
Data width32 bit
Floating Point UnitIntegrated
Level 1 cache size  ? 16 KB data cache
Level 2 cache size  ? 1 MB 8-way set associative cache with error-correction code
Features
  • MMX
  • SSE
  • SSE2
  • SSE3
Low power features
  • System Management mode
  • Auto HALT mode  ? 
  • Stop Grant mode  ? 
  • Sleep mode  ? 
 
Electrical/Thermal parameters
V core (V)  ? 1.25 - 1.4
Minimum/Maximum operating temperature (°C)  ? 5 - 69.1
Thermal Design Power (W)  ? 89
 
Notes on Intel B80546PE0561M
  • Bus frequency is 133 MHz. Because the processor uses Quad Data Rate bus the effective bus speed is 533 MHz
  • To distinguish this processor from Pentium 4 2.4 GHz with 512KB L2 cache, this CPU is often referred to as Pentium 4 2.4A GHz

Pictures (1)

 
2008-10-05 15:02:15
Posted by: Zdenek

  		 
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CPU ID

NOTE: CPU ID information below was taken from one CPU and may include features that are not present in all different steppings of the Intel Pentium 4 2.40 GHz CPU.

Manufacturer:Intel
Family:Pentium 4
Model / Processor Number:2.40 GHz
Part number:B80546PE0561M
S-Spec / Comment:SL88F
Submitted by:cocoe
General information
Vendor:GenuineIntel
Processor name (BIOS): Intel(R) Pentium(R) 4 CPU 2.40GHz
Cores:1
Logical processors:1
Processor type:Original OEM Processor
CPUID signature:F41
Family:15 (0Fh)
Model: 4 (04h)
Stepping: 1 (01h)
TLB/Cache details:Data TLB: 4-KB or 4-MB pages, fully associative, 64 entries
Instruction TLB: 4-KB, 2-MB or 4-MB pages, fully associative, 128 entries
No 2nd-level cache or, if processor contains a valid 2nd-level cache, no 3rd-level cache

Cache: L1 data L1 instruction L2
Size: 16 KB 12K uops 1 MB
Associativity: 8-way set
associative		 8-way set
associative		 8-way set
associative
Line size: 64 bytes   64 bytes
Other: sectored cache   sectored cache
 
Instruction set extensionsAdditonal instructions
MMX CLFLUSH
SSE CMOV
SSE2 CMPXCHG8B
SSE3 FXSAVE/FXRSTORE
  MONITOR/MWAIT
  SYSENTER/SYSEXIT
 
Major featuresOther features
On-chip Floating Point Unit 36-bit page-size extensions
  64-bit debug store
  Advanced programmable interrupt controller
  CPL qualified debug store
  Debug store
  Debugging extensions
  L1 context ID
  Machine check architecture
  Machine check exception
  Memory-type range registers
  Model-specific registers
  Page attribute table
  Page global extension
  Page-size extensions (4MB pages)
  Pending break enable
  Physical address extensions
  Self-snoop
  Thermal monitor
  Thermal monitor and software controlled clock facilities
  Time stamp counter
  Virtual 8086-mode enhancements
  xTPR Update Control

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Last modified: 15 Dec 2009
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