Intel Pentium Dual-Core Mobile U5400 CN80617006042AC
Specifications
Pentium Mobile U5400 is the first dual-core mobile Pentium CPU built on 32 nm process. As the "U" prefix in the processor number suggests, this mobile processor is an ultra-low voltage (ULV) part, that features smaller height owing to micro-BGA package, and significantly better power dissipation. As usual for ULV microprocessors, to achieve this kind of power savings, the U5400 uses lower core voltage and runs at much lower frequency, just 1.2 GHz, than standard-power microprocessors. Other features of this CPU are consistent with standard-power 32nm models with Arrandale core: dual-core design, separate interfaces for memory and peripheral devices, integrated graphics controller, per-core 256 KB level 2 cache, and large shared 3MB level 3 cache. The mobile Pentium U5400 incorporates only basic features of the Arrandale core, such as SIMD instructions from SSE to SSE4, 64-bit instruction set, and Execute disable bit, which prevents execution of certain types of viruses.
Like other Arrandale-based ULV parts, this Pentium processor has 18 Watt Thermal Design Power (TDP). This TDP value includes power dissipated by integrated graphics controller, and the TDP for the CPU cores alone is less than 11 Watt. As already been mentioned, the CPU is manufactured in a micro-BGA package, and cannot be easily replaced on a motherboard.
Pentium Mobile U5400 is somewhat faster than mobile Celeron U3400 CPU due to faster core frequency and larger size of L3 cache. Also, this mobile Pentium supports SSE4 instructions, therefore it could be even more faster than the Celeron in applications that utilize these instructions. When compared to more expensive Core i3-330UM model, the Pentium lacks HyperThreading technology, and cannot compete with the Core i3 CPU when running more than two-threads at once. The Core i3 microprocessor also supports Virtualization technology, which is missing from the mobile Pentium.
| General information | |||||||
| Type | CPU / Microprocessor | ||||||
| Market segment | Mobile | ||||||
| Family | Intel Pentium Dual-Core Mobile | ||||||
| Model number ? | U5400 | ||||||
| CPU part number | CN80617006042AC is an OEM/tray microprocessor | ||||||
| Frequency ? | 1200 MHz | ||||||
| Low power frequency | 667 MHz | ||||||
| Clock multiplier ? | 9 | ||||||
| Package | 1288-ball micro-FCBGA10 | ||||||
| Socket | BGA1288 | ||||||
| Size | 1.34" x 1.1" / 3.4cm x 2.8cm | ||||||
| Introduction date | May 24, 2010 | ||||||
| S-spec numbers | |||||||
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| Architecture / Microarchitecture | |||||||
| Microarchitecture | Nehalem (Westmere) | ||||||
| Platform | Calpella | ||||||
| Processor core ? | Arrandale | ||||||
| Core stepping ? | K0 (SLBUH) | ||||||
| CPUID | 20655 (SLBUH) | ||||||
| Manufacturing process | 0.032 micron 382 million transistors (CPU die) 177 million transistors (IMC / graphics die) | ||||||
| Die size | 81mm2 (CPU die) 114mm2 (IMC / graphics die) | ||||||
| Data width | 64 bit | ||||||
| The number of cores | 2 | ||||||
| The number of threads | 2 | ||||||
| Floating Point Unit | Integrated | ||||||
| Level 1 cache size ? | 2 x 32 KB instruction caches 2 x 32 KB data caches | ||||||
| Level 2 cache size ? | 2 x 256 KB | ||||||
| Level 3 cache size | Shared 3 MB | ||||||
| Multiprocessing | Not supported | ||||||
| Features |
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| Low power features | Enhanced SpeedStep technology ? | ||||||
| On-chip peripherals |
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| Electrical/Thermal parameters | |||||||
| Minimum/Maximum operating temperature ? | 0°C - 105°C | ||||||
| Thermal Design Power ? | 18 Watt | ||||||
| Notes on Intel CN80617006042AC | |||||||
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CPUs, related to Intel Pentium U5400
| Model | Cores / Threads |
Freq. | Turbo freq. |
L3 cache |
TDP | Features |
|---|---|---|---|---|---|---|
| Intel Pentium Dual-Core Mobile family, BGA1288 | ||||||
| Intel Pentium U5600 | 2 / 2 | 1.33 GHz | 3 MB | 18 Watt | ||
| Intel Pentium Dual-Core Mobile family, Nehalem micro-architecture, Other sockets | ||||||
| Intel Pentium P6000 | 2 / 2 | 1.86 GHz | 3 MB | 35 Watt | ||
| Intel Pentium P6100 | 2 / 2 | 2 GHz | 3 MB | 35 Watt | ||
| Intel Pentium P6200 | 2 / 2 | 2.13 GHz | 3 MB | 35 Watt | ||
| Intel Pentium P6300 | 2 / 2 | 2.26 GHz | 3 MB | 35 Watt | ||
| Other families, Nehalem micro-architecture, BGA1288 | ||||||
| Intel Mobile Celeron U3400 | 2 / 2 | 1.06 GHz | 2 MB | 18 Watt | VT | |
| Intel Mobile Celeron U3600 | 2 / 2 | 1.2 GHz | 2 MB | 18 Watt | VT | |
| Intel Mobile Celeron P4505 | 2 / 2 | 1.86 GHz | 2 MB | 35 Watt | VT | |
| Intel Core i3-370M (BGA) | 2 / 4 | 2.4 GHz | 3 MB | 35 Watt | SSE4, HT, VT | |
| Intel Core i3-380M (BGA) | 2 / 4 | 2.53 GHz | 3 MB | 35 Watt | SSE4, HT, VT | |
| Intel Core i7-640LM | 2 / 4 | 2.13 GHz | 2.93 GHz | 4 MB | 25 Watt | SSE4, AES, HT, VT, TXT, TBT |
| Intel Core i3-390M (BGA) | 2 / 4 | 2.66 GHz | 3 MB | 35 Watt | SSE4, HT, VT | |
| Intel Core I7-660LM | 2 / 4 | 2.26 GHz | 3.06 GHz | 4 MB | 25 Watt | SSE4, AES, HT, VT, TXT, TBT |
| Intel Core i5-540M (BGA) | 2 / 4 | 2.53 GHz | 3.06 GHz | 3 MB | 35 Watt | SSE4, AES, HT, VT, TXT, TBT |
| Intel Core i5-560M (BGA) | 2 / 4 | 2.66 GHz | 3.2 GHz | 3 MB | 35 Watt | SSE4, AES, HT, VT, TXT, TBT |
| Intel Core i5-580M (BGA) | 2 / 4 | 2.66 GHz | 3.33 GHz | 3 MB | 35 Watt | SSE4, AES, HT, VT, TXT, TBT |
| Intel Core i7-620M (BGA) | 2 / 4 | 2.66 GHz | 3.33 GHz | 4 MB | 35 Watt | SSE4, AES, HT, VT, TXT, TBT |
| Intel Core i7-640M (BGA) | 2 / 4 | 2.8 GHz | 3.46 GHz | 4 MB | 37 Watt | SSE4, AES, HT, VT, TXT, TBT |
• Highlighted numbers and features indicate whether specific processor performs better or worse than Pentium U5400
• Within each category, the CPUs are sorted from slower (at the top) to faster (at the bottom)
• List of related CPUs is not complete.
• Features abbreviations:
SSE4 - SSE4 instructions
AES - AES instructions
HT - Hyper-Threading
VT - Virtualization
TXT - Trusted Execution
TBT - Dynamic Acceleration / Turbo Boost
AES - AES instructions
HT - Hyper-Threading
VT - Virtualization
TXT - Trusted Execution
TBT - Dynamic Acceleration / Turbo Boost
Pictures (0)
News
Jun 24, 2010: It's been one month after the launch of six Intel ultra-low voltage
(ULV) microprocessors targeting different segments of mobile market.
Intel introduced at least one processor for each mobile family -
budget Mobile Celeron and Pentium Mobile, mid-class Core i3 and Core
i5, and high-performance Core i7 families.
May 31, 2010: Last week, on May 24, Intel announced 6 new ultra-low voltage (ULV)
mobile CPUs based on 32nm Arrandale core. The new processors target
budget, mid-class and high-performance segments of ultra-thin notebook
market.
CPU ID (1)
NOTE: CPU ID information below was taken from one CPU and may include features that are not present in all different steppings of the Intel Pentium Dual-Core Mobile U5400 CPU.
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| General information | |
|---|---|
| Vendor: | GenuineIntel |
| Processor name (BIOS): | Intel(R) Pentium(R) CPU U5400 @ 1.20GHz |
| Cores: | 2 |
| Logical processors: | 2 |
| Processor type: | Original OEM Processor |
| CPUID signature: | 20655 |
| Family: | 6 (06h) |
| Model: | 37 (025h) |
| Stepping: | 5 (05h) |
| TLB/Cache details: | 64-byte Prefetching Data TLB0: 2-MB or 4-MB pages, 4-way associative, 32 entries Data TLB: 4-KB Pages, 4-way set associative, 64 entries Instruction TLB: 2-MB or 4-MB pages, fully associative, 7 entries Instruction TLB: 4-KB Pages, 4-way set associative, 128 entries Shared 2nd-level TLB: 4 KB pages, 4-way set associative, 512 entries |
| Cache: | L1 data | L1 instruction | L2 | L3 |
|---|---|---|---|---|
| Size: | 2 x 32 KB | 2 x 32 KB | 2 x 256 KB | 3 MB |
| Associativity: | 8-way set associative |
4-way set associative |
8-way set associative |
12-way set associative |
| Line size: | 64 bytes | 64 bytes | 64 bytes | 64 bytes |
| Comments: | Shared between all cores |
| Instruction set extensions | Additional instructions | ||
|---|---|---|---|
| MMX | CLFLUSH | ||
| SSE | CMOV | ||
| SSE2 | CMPXCHG16B | ||
| SSE3 | CMPXCHG8B | ||
| SSSE3 | FXSAVE/FXRSTORE | ||
| MONITOR/MWAIT | |||
| POPCNT | |||
| SYSENTER/SYSEXIT | |||
| Major features | Other features | ||
| On-chip Floating Point Unit | 36-bit page-size extensions | ||
| 64-bit / Intel 64 | 64-bit debug store | ||
| NX bit/XD-bit | Advanced programmable interrupt controller | ||
| Enhanced SpeedStep | CPL qualified debug store | ||
| Debug store | |||
| Debugging extensions | |||
| Digital Thermal Sensor capability | |||
| LAHF/SAHF support in 64-bit mode | |||
| Machine check architecture | |||
| Machine check exception | |||
| Memory-type range registers | |||
| Model-specific registers | |||
| Page attribute table | |||
| Page global extension | |||
| Page-size extensions (4MB pages) | |||
| Pending break enable | |||
| Perfmon and Debug capability | |||
| Physical address extensions | |||
| Process context identifiers | |||
| RDTSCP | |||
| Self-snoop | |||
| TSC rate is ensured to be invariant across all states | |||
| Thermal monitor | |||
| Thermal monitor 2 | |||
| Thermal monitor and software controlled clock facilities | |||
| Time stamp counter | |||
| Virtual 8086-mode enhancements | |||
| xTPR Update Control | |||
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