| General information |
| Type | CPU / Microprocessor |
| Frequency (MHz) ? | 180 |
| Package | 599-land ceramic LGA |
| Size | 1.87" x 1.87" / 4.75cm x 4.75cm |
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| Architecture / Microarchitecture |
| Manufacturing process | 0.35 micron CMOS process
6.7 million transistors |
| Die size | 306mm2 (17mm x 18mm) |
| Data width | 64 bit |
| Floating Point Unit | Integrated |
| Level 1 cache size ? | 32 KB 2-way set associative instruction cache
32 KB 2-way set associative write-back data cache |
| Multiprocessing | Up to 4 processors |
| On-chip peripherals | Secondary cache controller |
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| Electrical/Thermal parameters |
| V core (V) ? | 3.3 ± 5% |
| Minimum/Maximum operating temperature (°C) ? | 20 - 85 |
| Maximum power dissipation (W) ? | 30 |
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| Notes |
- Secondary cache controller is 128-bit wide and 2-way set associative, and it supports 512 KB - 16 MB external write-back cache
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