| General information |
| Type | CPU / Microprocessor |
| Frequency (MHz) ? | 25 |
| Package | 144-pin PGA |
| |
| Architecture / Microarchitecture |
| Manufacturing process | High-speed CEMOS technology |
| Data width | 32 bit |
| Floating Point Unit | IDT79R3010 |
| Level 1 cache size ? | External 0 KB - 256 KB instruction cache
External 0 KB - 256 KB data cache |
| Physical memory (GB) | 4 |
| Virtual memory (GB) | 4 |
| Multiprocessing | Supported |
| On-chip peripherals | - Memory Management Unit
- Coprocessor interface
- On-chip Cache Control
|
| |
| Electrical/Thermal parameters |
| V I/O or secondary (V) | 5 ± 5% |
| Min/Max operating temperature (°C) ? | 0 - 70 |
| Max power dissipation (W) ? | 3.94 |
| |
| Notes |
- Some processors capabilities, such as cache size, multiprocessor interface, "big-endian" or "little-endian" byte ordering, can be configured immediately after processor reset
- Instruction-compatible with 79R2000 and 79R2000A processors
- Pin-compatible with 79R2000A CPU
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