MIPS Technologies R3010

MIPS R3010 is a numeric co-processor for R3000 RISC processor. R3000 FPU can perform conversion, comparison, load, store, move and arithmetic operations with single and double-precision numbers. The R3010 FPU resides on the same system bus as the main CPU, and communicates with the CPU using R3000 co-processor interface. During its operation the R3010 co-processor monitors system bus, and when it encounters floating-point instruction it loads it into 6-stage pipeline, where the instruction is decoded and executed. For instruction execution the FPU utilizes three calculation units: Addition/Subtraction, Multiplication and Division. Operations in these units can be performed concurrently, which allows the co-processor to execute up to three different instructions at the same time. Also, during execution of floating-point instructions the main processor may continue to execute non-floating instructions. Once the FPU finishes instruction processing, it sends results and exception data back to the CPU. Please note that while the co-processor doesn't require assistance of the main CPU in processing floating-point instructions, it still requires the main CPU to generate necessary cache and memory signals.