NEC D30401RJ-50 (VR4000SC-50)


Specifications

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General information
TypeCPU / Microprocessor
Frequency  ? 50 MHz
Clock multiplier  ? 2, 3 or 4
Package447-pin staggered ceramic PGA
 
Architecture / Microarchitecture
Manufacturing process1.3 million transistors
Data width64 bit
Floating Point UnitIntegrated
Level 1 cache size  ? 8 KB direct-mapped code cache, can be expanded to 32 KB
8 KB direct-mapped write-back data cache, can be expanded to 32 KB
Level 2 cache size  ? External 128 KB - 4 MB
Physical memory64 GB
Virtual memory2 GB (32-bit mode); 1 TB (64-bit mode)
Pipeline8 stages
On-chip peripherals
  • 128-bit secondary cache bus interface
  • System control coprocessor
  • Memory management unit
 
Notes
  • Internal pipeline operates at 100 MHz.

Pictures (1)

NEC D30401RJ-50 (VR4000SC-50)

50 MHz
NEC D30401RJ-50 (VR4000SC-50)

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