| Type | Microprocessor |
| Introduction date | 5/23/1994 |
| Manufacturing process | 0.35 micron CMOS technology
2.3 million transistors |
| Data bus width | 64 bit |
| Package | 447-pin staggered ceramic PGA |
| Speed (MHz) |
- 100 (externla)
- 200 (internal)
|
| Clock multiplier | 2, 3, 4, 6 or 8 |
| On-chip peripherals |
- 128-bit secondary cache bus interface
- System control processor
- Memory management unit
|
| Physical memory (GB) | 64 |
| Virtual memory | 2 GB (user mode); 2.5 GB (supervisor mode); 4 GB (kernel mode) |
| Level 1 cache size | 16 KB direct-mapped code cache
16 KB direct-mapped data cache |
| Level 2 cache size | External 128 KB - 4 MB |
| Floating Point Unit | Integrated |
Notes:- Binary compatible with R3000A
|
|
|
R4400 family