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Toshiba TC86R4400MC-200
Specifications
| General information |
| Type | CPU / Microprocessor |
| Family | Toshiba R4400 |
| CPU part number | TC86R4400MC-200 is an OEM/tray microprocessor |
| Frequency (MHz) ? | 100 (external)
200 (internal) |
| Clock multiplier ? | 2, 3, 4, 6 or 8 |
| Package | 447-pin staggered ceramic PGA |
| Introduction date | May 23, 1994 |
| | | Architecture / Microarchitecture |
| Manufacturing process | 0.35 micron CMOS technology
2.3 million transistors |
| Die size | 184mm2 |
| Data width | 64 bit |
| Floating Point Unit | Integrated |
| Level 1 cache size ? | 16 KB direct-mapped code cache
16 KB direct-mapped data cache |
| Level 2 cache size ? | External 128 KB - 4 MB |
| Physical memory (GB) | 64 |
| Virtual memory | 2 GB (user mode); 2.5 GB (supervisor mode); 4 GB (kernel mode) |
| Pipeline | 8-stage |
| On-chip peripherals | - 128-bit secondary cache bus interface
- System control processor
- Memory management unit
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| | | Electrical/Thermal parameters | | |
| Notes on Toshiba TC86R4400MC-200 |
- Binary compatible with R3000A
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Pictures (1)
| Toshiba TC86R4400MC-200 |
200 MHz
447-pin staggered ceramic PGA |
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Related Links
Architecture Identification Pinouts Support chips
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