National Semiconductor SC/MP CPU family
National Semiconductor's SC/MP family of 8-bit microprocessors was introduced at the beginning of 1976. SC/MP abbreviation stands for Simple Cost-effective MicroProcessor, and is pronounced as SCAMP. The SC/MP processor can address up to 64 KB memory, although certain types of memory accesses cannot cross 4 KB memory block boundaries. For example, the CPU cannot cross 4 KB memory block boundary when executing continuous sequence of instructions. Instruction set of the INS8060 is quite simple and consists of 46 one- and two-byte instructions. Two-byte instructions include an opcode and one byte immediate or displacement value. It's not possible to specify 12- or 16-bit memory address as part of an instruction, therefore to access any arbitrary memory location the CPU needs to load memory address into one of pointer registers, and then use this register to access the memory. Despite of its simplicity, the instructions set includes fairly advanced Auto-indexing addressing method, which is used to access any memory location referenced by one of pointer registers, and adjust the pointer register afterwards. There are also a few interesting instructions, such as DLY (delays program execution by certain number of microcycles), XPPC (exchange pointer register with program counter), or ILD/DLD (load data from memory and increment/decrement memory after that). Because the processor doesn't have stack memory and doesn't have built-in support for subroutines, the above mentioned XPPC instruction is especially useful for emulation of subroutine calls. The INS8060 processor supports interrupts.
Like many microprocessors of its time, the SC/MP requires multiple CPU cycles (microcycles) to execute one instruction. About half of SC/MP instructions take from 5 to 9 microcycles to execute, and remaining half requires 10 or more microcycles. SC/MP CPU with 1 MHz external crystal has 2 microsecond microcycle time, hence the fastest instructions can be executed in 10 microseconds, which translates into 100,000 operations per second. Register-to-register arithmetic and logical instructions require 6 microcycles, which equals approximately 83,000 operations per second. Memory-to-register arithmetic instructions are much slower - the SC/MP executes 28,000 of such operations per second. This is significantly slower than other microprocessors of its time (Intel 8080, MOS technology 6502, etc).
National Semiconductor SC/MP processors were manufactured in 40-pin DIP package. There were no second-source manufacturers of SC/MP microprocessors.
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