National Semiconductor SC/MP II (INS8060) CPU family

National Semiconductor SC/MP II, or INS8060, is an enhanced version of Simple Cost-effective MicroProcessor (SC/MP) family. The SC/MP II processors are object-code compatible with the SC/MP. Major differences of the INS8060 family from the original family is better NMOS manufacturing process, lower power consumption at higher frequencies, and single 5 Volt power supply. Processor's micro-architecture didn't change - the INS8060 supports interrupts, can address up to 64 KB memory (with some limitations), has the same 46 instructions as the SC/MP processors, and doesn't have on-chip stack. Efficiency of SC/MP II CPU instructions didn't change too - they still require from 5 to 23 cycles to execute. However, the SC/MP II has better performance due to higher clock frequency. Whereas SC/MP had 2 microsecond microcycle time at 1 MHz, the INS8060 has 1 microsecond microcycle time at 4 MHz.

National Semiconductor SC/MP II processors were manufactured in 40-pin DIP package. There were no second-source manufacturers of INS8060 microprocessors.