Sun Microsystems STP1031LGA 360 MHz
Information
History
Architecture
Identification
Pinouts
Support chips
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Type
Microprocessor
Introduction date
5-May-98
Manufacturing process
0.35 micron 5-layer metal CMOS technology
5.4 million transistors
Data bus width
64 bit
Package
787-land ceramic LGA
Speed (MHz)
360
Clock multiplier
2x, 3x or 4x
On-chip peripherals
Memory Management Unit
Level 2 cache controller
Other features
Visual Instruction Set
Level 1 cache size
16 KB pseudo 2-way set associative code cache
16 KB write-through direct-mapped data cache
Level 2 cache size
external 0.5 MB - 16 MB L2 cache
Floating Point Unit
Integrated
V I/O or secondary (V)
3.3
Notes:
Pin-compatible with UltraSparc I
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Last modified: 2 Dec 2005
UltraSparcII family
List of processor families
(c) Copyright 2003 Gennadiy Shvets