Sun Microsystems UltraSparc IIi familySun UltraSparc IIi is the second generation of UltraSparc processors. This
64-bit microprocessor is backwards compatible with UltraSparc I and
UltraSparc II. The CPU implements UPA bus architecture, and integrates
PCI controller, I/O memory management and control units, memory controller,
and level 2 cache controller. The UltraSparc IIi CPU supports up to 2 MB
level 2 external cache.
Production parts![]() 270 MHz
587-land ceramic LGA ![]() 300 MHz
587-land ceramic LGA ![]() 333 MHz
587-land ceramic LGA ![]() 360 MHz
587-land ceramic LGA ![]() 333 MHz
587-land ceramic LGA ![]() 360 MHz
587-land ceramic LGA ![]() 440 MHz
587-land ceramic LGA
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Architecture Identification Pinouts Support chips At a glanceType: 64-bit microprocessor Technology (micron): 0.18 - 0.35 Frequency (MHz): 270 - 650 L2 cache size (KB): 0, 512 Multiprocessing: 1 | ||||||