| General information |
| Type | CPU / Microprocessor |
| Frequency (MHz) ? | 180 |
| Bus speed (MHz) ? | 60 |
| Clock multiplier ? | 3 |
| Package | 296-pin Staggered Ceramic Pin Grid Array, 1.95" x 1.95" (4.95 cm x 4.95 cm) |
| Socket | Socket 7 |
| Introduction date | 13-Oct-97 |
| Price at introduction | $90 |
| |
| Architecture / Microarchitecture |
| Manufacturing process | 0.35 micron 4-layer metal CMOS technology
5.4 million transistors |
| Die size | 88 mm2 mm2 |
| Data width | 32 bit |
| Floating Point Unit | Integrated |
| Level 1 cache size ? | 32 KB 2-way set associative code cache
32 KB 2-way set associative data cache |
| Physical memory (GB) | 4 |
| Multiprocessing | N |
| Features | MMX technology |
| Low power features | - STOP CLOCK state
- STOP GRANT state ?
- STOP CLOCK SNOOP state
- AUTOHALT state ?
- Dynamic power management - MMX and FPU units, and some other circuits are powered down when not in use
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| |
| Electrical/Thermal parameters |
| Min/Recommended/Max V core (V) | 3.45 / 3.52 / 3.6 |
| Minimum/Maximum operating temperature (°C) ? | 0 - 60 |
| Minimum/Maximum power dissipation (W) ? | 3.5 (Stop Clock mode) / 11.5 |
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