Specifications
| General information |
| Type | CPU / Microprocessor |
| Market segment | Server |
| Family | Intel Xeon 5200 |
| Model number ? | E5220 |
| CPU part numbers | EU80573KJ0536M is an OEM/tray microprocessor AT80573QJ0536M is an OEM/tray microprocessor |
| Frequency ? | 2333 MHz |
| Bus speed ? | 1333 MHz |
| Clock multiplier ? | 7 |
| Package | 771-land Flip-Chip Land Grid Array (FC-LGA)
1.48" x 1.48" (3.75 cm x 3.75 cm) |
| Socket | Socket 771 (LGA771) |
| Introduction date | Feb 27, 2008 |
| |
| S-spec numbers |
| |
ES/QS processors |
Production processors |
| Part number |
Q2LE |
QFYX |
SLANF |
SLBAT |
| AT80573QJ0536M | | + | | + |
| EU80573KJ0536M | + | | + | |
|
| |
| Architecture / Microarchitecture |
| Microarchitecture | Core |
| Platform | Bensley
Bensley-VS
Cranberry Lake
Stoakley |
| Processor core ? | Wolfdale |
| Core steppings ? | A1 (Q2LE) C0 (SLANF) E0 (QFYX, SLBAT) |
| CPUIDs | 10676 (SLANF) 1067A (QFYX, SLBAT) |
| Manufacturing process | 0.045 micron
410 million transistors |
| Die size | 107mm2 |
| Data width | 64 bit |
| The number of cores | 2 |
| The number of threads | 2 |
| Floating Point Unit | Integrated |
| Level 1 cache size ? | 2 x 32 KB instruction caches
2 x 32 KB write-back data caches |
| Level 2 cache size ? | shared 6 MB cache |
| Multiprocessing | Up to 2 processors |
| Features | - MMX technology
- SSE
- SSE2
- SSE3
- SSE4.1 ?
- EM64T technology ?
- Execute disable bit ?
- Virtualization technology ?
|
| Low power features | - HALT state
- Extended HALT state
- Stop Grant state ?
- Enhanced SpeedStep technology ?
|
| |
| Electrical/Thermal parameters |
| V core ? | 0.85V - 1.35V |
| Minimum/Maximum operating temperature ? | 5°C - 66°C |
| Maximum power dissipation ? | 99.72 Watt
82.02 Watt (sustained) |
| Thermal Design Power ? | 65 Watt |
| |
| Notes on Intel EU80573KJ0536M |
- Bus frequency is 333 MHz. Because the processor uses Quad Data Rate bus the effective bus speed is 1333 MHz
- Part AT80573QJ0536M is manufactured in halide-free package
|
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