|
Intel Xeon E5502 - AT80602000804AA (BX80602E5502)
Specifications
| General information |
| Type | CPU / Microprocessor |
| Market segment | Server |
| Family | Intel Xeon 5500 |
| Model number ? | E5502 |
| CPU part numbers | AT80602000804AA is an OEM/tray microprocessor BX80602E5502 is a boxed microprocessor |
| Frequency ? | 1867 MHz |
| Bus speed ? | 2400 MHz QPI |
| Package | 1366-land Flip-Chip Land Grid Array (FC-LGA8)
1.77" x 1.67" (4.5 cm x 4.25 cm) |
| Socket | Socket 1366 (LGA1366) |
| Introduction date | March 30, 2009 |
| Price at introduction | $188 |
| | | S-spec numbers |
| |
ES/QS processors |
Production processors |
| Part number |
Q1E6 |
Q1G8 |
QGYE |
SLBEZ |
| AT80602000804AA | + | + | + | + |
| BX80602E5502 | | | | + |
|
| | | Architecture / Microarchitecture |
| Microarchitecture | Nehalem |
| Platform | Tylersburg-EP
Tylersburg-EN
Tylersburg-WS |
| Processor core ? | Nehalem-EP |
| Core stepping ? | D0 (Q1G8, SLBEZ) |
| CPUID | 106A5 (SLBEZ) |
| Manufacturing process | 0.045 micron |
| Data width | 64 bit |
| The number of cores | 2 |
| The number of threads | 2 |
| Floating Point Unit | Integrated |
| Level 1 cache size ? | 2 x 32 KB instruction caches
2 x 32 KB data caches |
| Level 2 cache size ? | 2 x 256 KB |
| Level 3 cache size | 4 MB |
| Physical memory | 144 GB |
| Multiprocessing | Up to 2 processors |
| Features | - MMX instruction set
- SSE
- SSE2
- SSE3
- Supplemental SSE3
- SSE4.1 ?
- SSE4.2 ?
- EM64T technology ?
- Virtualization technology ?
- Execute Disable bit ?
|
| Low power features | - Thread C1/C1E, C3 and C6 states
- Core C1/C1E, C3 and C6 states
- Package C1/C1E, C3 and C6 states
- Enhanced SpeedStep technology ?
|
| On-chip peripherals | - Integrated 6-channel DDR3 SDRAM Memory controller
- Quick Path Interconnect (2 links)
|
| | | Electrical/Thermal parameters |
| V core ? | 0.75V - 1.35V |
| Minimum/Maximum operating temperature ? | 5°C - 76°C |
| Maximum power dissipation ? | 173.59 Watt
137.17 Watt (sustained) |
| Thermal Design Power ? | 80 Watt |
| |
| Notes on Intel AT80602000804AA |
- Memory controller supports DDR3-800 memory
|
CPUs, related to Intel Xeon E5502
| Model |
Cores / Threads |
Freq. |
Turbo freq. |
L3 cache |
Multi- processing |
TDP |
Features |
| Intel Xeon 5500 family, Socket 1366 |
| Intel Xeon E5520 | 4 / 8 | 2.26 GHz | | 8 MB | 2 | 80 Watt | TBT |
| Intel Xeon L5520 | 4 / 8 | 2.26 GHz | | 8 MB | 2 | 60 Watt | TBT |
| Intel Xeon L5530 | 4 / 8 | 2.4 GHz | | 8 MB | 2 | 60 Watt | |
| Intel Xeon E5530 | 4 / 8 | 2.4 GHz | | 8 MB | 2 | 80 Watt | TBT |
| Intel Xeon E5540 | 4 / 8 | 2.53 GHz | | 8 MB | 2 | 80 Watt | TBT |
| Intel Xeon X5550 | 4 / 8 | 2.66 GHz | | 8 MB | 2 | 95 Watt | TBT |
| Intel Xeon X5560 | 4 / 8 | 2.8 GHz | | 8 MB | 2 | 95 Watt | TBT |
| Intel Xeon X5570 | 4 / 8 | 2.93 GHz | | 8 MB | 2 | 95 Watt | TBT |
| Intel Xeon W5580 | 4 / 8 | 3.2 GHz | | 8 MB | 2 | 130 Watt | TBT |
| Intel Xeon W5590 | 4 / 8 | 3.33 GHz | | 8 MB | 2 | 130 Watt | |
| Other families, Nehalem micro-architecture, Socket 1366 |
| Intel Xeon X5670 | 6 / 12 | 2.93 GHz | 3.33 GHz | 12 MB | 2 | 95 Watt | AES, TXT, TBT |
| Intel Xeon X5679 | 6 / 12 | 3.2 GHz | | 12 MB | 2 | | AES, TXT, TBT |
| Intel Xeon X5675 | 6 / 12 | 3.06 GHz | 3.46 GHz | 12 MB | 2 | 95 Watt | AES, TXT, TBT |
| Intel Xeon W3670 | 6 / 12 | 3.2 GHz | 3.46 GHz | 12 MB | 1 | 130 Watt | AES, TXT, TBT |
| Intel Xeon W3680 | 6 / 12 | 3.33 GHz | 3.6 GHz | 12 MB | 1 | 130 Watt | AES, TXT, TBT |
| Intel Xeon X5680 | 6 / 12 | 3.33 GHz | 3.6 GHz | 12 MB | 2 | 130 Watt | AES, TXT, TBT |
| Intel Xeon W3690 | 6 / 12 | 3.46 GHz | 3.73 GHz | 12 MB | 1 | 130 Watt | AES, TXT, TBT |
| Intel Xeon X5690 | 6 / 12 | 3.46 GHz | 3.73 GHz | 12 MB | 2 | 130 Watt | AES, TXT, TBT |
• Highlighted numbers and features indicate whether specific processor performs better or worse than Xeon E5502
• Within each category, the CPUs are sorted from slower (at the top) to faster (at the bottom)
• List of related CPUs is not complete.
• Features abbreviations:
AES - AES instructions TXT - Trusted Execution TBT - Dynamic Acceleration / Turbo Boost
CPU ID (1)
NOTE: CPU ID information below was taken from one CPU and
may include features that are not present in all different steppings of the
Intel Xeon E5502 CPU.
| Manufacturer: | Intel |
| CPU Family: | Xeon |
| Processor Number: | E5502 |
| Frequency: | 1867 MHz |
|
| Part number: | AT80602000804AA |
| S-Spec Number: | |
| Comment: | |
| Submitted by: | IraqI_Freedom |
|
| General information |
| Vendor: | GenuineIntel |
| Processor name (BIOS): | Intel(R) Xeon(R) CPU E5502 @ 1.87GHz |
| Cores: | 2 |
| Logical processors: | 2 |
| Processor type: | Original OEM Processor |
| CPUID signature: | 106A4 |
| Family: | 6 (06h) |
| Model: | 26 (01Ah) |
| Stepping: | 4 (04h) |
| TLB/Cache details: | 64-byte Prefetching
Data TLB0: 2-MB or 4-MB pages, 4-way associative, 32 entries
Data TLB: 4-KB Pages, 4-way set associative, 64 entries
Instruction TLB: 2-MB or 4-MB pages, fully associative, 7 entries
Instruction TLB: 4-KB Pages, 4-way set associative, 128 entries
Shared 2nd-level TLB: 4 KB pages, 4-way set associative, 512 entries |
| Cache: |
L1 data |
L1 instruction |
L2 |
L3 |
| Size: |
2 x 32 KB |
2 x 32 KB |
2 x 256 KB |
4 MB |
| Associativity: |
8-way set associative |
4-way set associative |
8-way set associative |
16-way set associative |
| Line size: |
64 bytes |
64 bytes |
64 bytes |
64 bytes |
| Comments: |
|
|
|
Shared between all cores |
| |
| Instruction set extensions | Additional instructions |
| MMX |
CLFLUSH |
| SSE |
CMOV |
| SSE2 |
CMPXCHG16B |
| SSE3 |
CMPXCHG8B |
| SSSE3 |
FXSAVE/FXRSTORE |
| SSE4.1 |
MONITOR/MWAIT |
| SSE4.2 |
POPCNT |
| |
SYSENTER/SYSEXIT |
| |
| Major features | Other features |
| On-chip Floating Point Unit |
36-bit page-size extensions |
| 64-bit / Intel 64 |
64-bit debug store |
| Intel Virtualization |
Advanced programmable interrupt controller |
| Enhanced SpeedStep |
CPL qualified debug store |
| |
Debug store |
| |
Debugging extensions |
| |
Digital Thermal Sensor capability |
| |
Direct Cache access |
| |
LAHF/SAHF support in 64-bit mode |
| |
Machine check architecture |
| |
Machine check exception |
| |
Memory-type range registers |
| |
Model-specific registers |
| |
Page attribute table |
| |
Page global extension |
| |
Page-size extensions (4MB pages) |
| |
Pending break enable |
| |
Perfmon and Debug capability |
| |
Physical address extensions |
| |
RDTSCP |
| |
Self-snoop |
| |
TSC rate is ensured to be invariant across all states |
| |
Thermal monitor |
| |
Thermal monitor 2 |
| |
Thermal monitor and software controlled clock facilities |
| |
Time stamp counter |
| |
Virtual 8086-mode enhancements |
| |
xTPR Update Control |
|
|