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Intel Xeon X5660 - AT80614005127AA (BX80614X5660)
Specifications
| General information |
| Type | CPU / Microprocessor |
| Market segment | Server |
| Family | Intel Xeon 5600 |
| Model number ? | X5660 |
| CPU part numbers | AT80614005127AA is an OEM/tray microprocessor BX80614X5660 is a boxed microprocessor |
| Frequency ? | 2800 MHz |
| Turbo frequency | 3200 MHz (1 or 2 cores)
3067 MHz (3 or more cores) |
| Bus speed ? | 3200 MHz QPI |
| Clock multiplier ? | 21 |
| Package | 1366-land Flip-Chip Land Grid Array (FC-LGA10) |
| Socket | Socket 1366 (LGA1366) |
| Size | 1.77" x 1.67" / 4.5cm x 4.25cm |
| Introduction date | March 16, 2010 |
| Price at introduction | $1219 |
| | | S-spec numbers |
| |
ES/QS processors |
Production processors |
| Part number |
Q3QX |
Q3UX |
Q4EN |
SLBV6 |
| AT80614005127AA | + | + | + | + |
| BX80614X5660 | | | | + |
|
| | | Architecture / Microarchitecture |
| Microarchitecture | Nehalem |
| Platform | Tylersburg-EP
Tylersburg-EN
Tylersburg-WS |
| Processor core ? | Westmere-EP |
| Core steppings ? | B0 (Q3UX) B1 (Q4EN, SLBV6) |
| CPUIDs | 206C1 (Q3UX) 206C2 (SLBV6) |
| Manufacturing process | 0.032 micron High-K metal gate process
1170 million transistors |
| Die size | 240mm2 |
| Data width | 64 bit |
| The number of cores | 6 |
| The number of threads | 12 |
| Floating Point Unit | Integrated |
| Level 1 cache size ? | 6 x 32 KB instruction caches
6 x 32 KB data caches |
| Level 2 cache size ? | 6 x 256 KB |
| Level 3 cache size | 12 MB |
| Multiprocessing | Up to 2 processors |
| Features | - MMX instruction set
- SSE
- SSE2
- SSE3
- Supplemental SSE3
- SSE4.1 ?
- SSE4.2 ?
- AES instructions
- EM64T technology ?
- Execute Disable bit ?
- Hyper-Threading technology ?
- Virtualization technology ?
- Trusted Execution Technology
- Turbo Boost Technology ?
|
| Low power features | Enhanced SpeedStep technology ? |
| On-chip peripherals | - 3-channel DDR3 SDRAM Memory controller
- Quick Path Interconnect (2 links)
|
| | | Electrical/Thermal parameters |
| V core ? | 0.8V - 1.3V |
| Thermal Design Power ? | 95 Watt |
| |
| Notes on Intel AT80614005127AA |
- Memory controller supports DDR3-800, DDR3-1066 and DDR3-1333 memory
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CPUs, related to Intel Xeon X5660
| Model |
Cores / Threads |
Freq. |
Turbo freq. |
L3 cache |
Multi- processing |
TDP |
Features |
| Intel Xeon 5600 family, Socket 1366 |
| Intel Xeon X5687 | 4 / 8 | 3.6 GHz | 3.86 GHz | 12 MB | 2 | 130 Watt | AES, TXT, TBT |
| Intel Xeon E5645 | 6 / 12 | 2.4 GHz | 2.8 GHz | 12 MB | 2 | 80 Watt | AES, TXT, TBT |
| Intel Xeon L5645 | 6 / 12 | 2.4 GHz | 2.93 GHz | 12 MB | 2 | 60 Watt | AES, TXT, TBT |
| Intel Xeon E5649 | 6 / 12 | 2.53 GHz | 2.93 GHz | 12 MB | 2 | 80 Watt | AES, TXT, TBT |
| Intel Xeon X5650 | 6 / 12 | 2.66 GHz | 3.06 GHz | 12 MB | 2 | 95 Watt | AES, TXT, TBT |
| Intel Xeon X5670 | 6 / 12 | 2.93 GHz | 3.33 GHz | 12 MB | 2 | 95 Watt | AES, TXT, TBT |
| Intel Xeon X5679 | 6 / 12 | 3.2 GHz | | 12 MB | 2 | | AES, TXT, TBT |
| Intel Xeon X5675 | 6 / 12 | 3.06 GHz | 3.46 GHz | 12 MB | 2 | 95 Watt | AES, TXT, TBT |
| Intel Xeon X5680 | 6 / 12 | 3.33 GHz | 3.6 GHz | 12 MB | 2 | 130 Watt | AES, TXT, TBT |
| Intel Xeon X5690 | 6 / 12 | 3.46 GHz | 3.73 GHz | 12 MB | 2 | 130 Watt | AES, TXT, TBT |
| Other families, Nehalem micro-architecture, Socket 1366 |
| Intel Xeon W3565 | 4 / 8 | 3.2 GHz | | 8 MB | 1 | 130 Watt | AES, TXT, TBT |
| Intel Xeon W3570 | 4 / 8 | 3.2 GHz | | 8 MB | 1 | 130 Watt | AES, TXT, TBT |
| Intel Xeon W5580 | 4 / 8 | 3.2 GHz | | 8 MB | 2 | 130 Watt | AES, TXT, TBT |
| Intel Xeon W5590 | 4 / 8 | 3.33 GHz | | 8 MB | 2 | 130 Watt | AES, TXT, TBT |
| Intel Xeon W3580 | 4 / 8 | 3.33 GHz | | 8 MB | 1 | 130 Watt | AES, TXT, TBT |
| Intel Xeon W3670 | 6 / 12 | 3.2 GHz | 3.46 GHz | 12 MB | 1 | 130 Watt | AES, TXT, TBT |
| Intel Xeon W3680 | 6 / 12 | 3.33 GHz | 3.6 GHz | 12 MB | 1 | 130 Watt | AES, TXT, TBT |
| Intel Xeon W3690 | 6 / 12 | 3.46 GHz | 3.73 GHz | 12 MB | 1 | 130 Watt | AES, TXT, TBT |
• Highlighted numbers and features indicate whether specific processor performs better or worse than Xeon X5660
• Within each category, the CPUs are sorted from slower (at the top) to faster (at the bottom)
• List of related CPUs is not complete.
• Features abbreviations:
AES - AES instructions TXT - Trusted Execution TBT - Dynamic Acceleration / Turbo Boost
CPU ID (1)
NOTE: CPU ID information below was taken from one CPU and
may include features that are not present in all different steppings of the
Intel Xeon X5660 CPU.
| Manufacturer: | Intel |
| CPU Family: | Xeon |
| Processor Number: | X5660 |
| Frequency: | 2796 MHz |
|
| Part number: | AT80614005127AA |
| S-Spec Number: | Q4EN |
| Comment: | Engeneering sample of B1 stepping |
| Submitted by: | dosvidos |
|
| General information |
| Vendor: | GenuineIntel |
| Processor name (BIOS): | Intel(R) Xeon(R) CPU X5660 @ 2.80GHz |
| Cores: | 6 |
| Logical processors: | 12 |
| Processor type: | Original OEM Processor |
| CPUID signature: | 206C2 |
| Family: | 6 (06h) |
| Model: | 44 (02Ch) |
| Stepping: | 2 (02h) |
| TLB/Cache details: | 64-byte Prefetching
Data TLB0: 2-MB or 4-MB pages, 4-way associative, 32 entries
Data TLB: 4-KB Pages, 4-way set associative, 64 entries
Instruction TLB: 2-MB or 4-MB pages, fully associative, 7 entries
Instruction TLB: 4-KB pages, 4-way set associative, 64 entries
Shared 2nd-level TLB: 4 KB pages, 4-way set associative, 512 entries |
| Cache: |
L1 data |
L1 instruction |
L2 |
L3 |
| Size: |
6 x 32 KB |
6 x 32 KB |
6 x 256 KB |
12 MB |
| Associativity: |
8-way set associative |
4-way set associative |
8-way set associative |
16-way set associative |
| Line size: |
64 bytes |
64 bytes |
64 bytes |
64 bytes |
| |
| Instruction set extensions | Additional instructions |
| MMX |
CLFLUSH |
| SSE |
CMOV |
| SSE2 |
CMPXCHG16B |
| SSE3 |
CMPXCHG8B |
| SSSE3 |
FXSAVE/FXRSTORE |
| SSE4.1 |
MONITOR/MWAIT |
| SSE4.2 |
PCLMULDQ |
| AES instructions |
POPCNT |
| |
SYSENTER/SYSEXIT |
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| Major features | Other features |
| On-chip Floating Point Unit |
1 GB large page support |
| 64-bit / Intel 64 |
36-bit page-size extensions |
| NX bit/XD-bit |
64-bit debug store |
| Hyper-Threading Technology |
Advanced programmable interrupt controller |
| Intel Virtualization |
CPL qualified debug store |
| Intel Trusted Execution technology |
Debug store |
| Turbo Boost |
Debugging extensions |
| Enhanced SpeedStep |
Digital Thermal Sensor capability |
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Direct Cache access |
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LAHF/SAHF support in 64-bit mode |
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Machine check architecture |
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Machine check exception |
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Memory-type range registers |
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Model-specific registers |
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Page attribute table |
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Page global extension |
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Page-size extensions (4MB pages) |
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Pending break enable |
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Perfmon and Debug capability |
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Physical address extensions |
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Process context identifiers |
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RDTSCP |
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Self-snoop |
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TSC rate is ensured to be invariant across all states |
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Thermal monitor |
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Thermal monitor 2 |
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Thermal monitor and software controlled clock facilities |
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Time stamp counter |
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Virtual 8086-mode enhancements |
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xTPR Update Control |
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